• Journal of Power Electronics
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• v.16 no.1
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• pp.362-373
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• 2016

The on-line measurement of high-power IGBT collector current is important for the hierarchical control and short-circuit and overcurrent protection of its driver and the sensorless control of the converter. The conventional on-line measurement methods for IGBT collector current are not suitable for engineering measurement due to their large-size, high-cost, low-efficiency sensors, current transformers or dividers, etc. Based on the gate driver, this paper has proposed a current measuring circuit for IGBT collector current. The circuit is used to conduct non-intervention on-line measurement of IGBT collector current by detecting the voltage drop of the IGBT power emitter and the auxiliary emitter terminals. A theoretical analysis verifies the feasibility of this circuit. The circuit adopts an operational amplifier for impedance isolation to prevent the measuring circuit from affecting the dynamic performance of the IGBT. Due to using the scheme for integration first and amplification afterwards, the difficult problem of achieving high accuracy in the transient-state and on-state measurement of the voltage between the terminals of IGBT power emitter and the auxiliary emitter (u_Ee) has been solved. This is impossible for a conventional detector. On this basis, the adoption of a two-stage operational amplifier can better meet the requirements of high bandwidth measurement under the conditions of a small signal with a large gain. Finally, various experiments have been carried out under the conditions of several typical loads (resistance-inductance load, resistance load and inductance load), different IGBT junction temperatures, soft short-circuits and hard short-circuits for the on-line measurement of IGBT collector current. This is aided by the capacitor voltage which is the integration result of the voltage uEe. The results show that the proposed method of measuring IGBT collector current is feasible and effective.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.4 s.310
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• pp.45-52
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• 2006

In his paper, we have developed the SMD(surface mounted device) type PECL(positive emitter-coupled logic) VCXO of the $5{\times}7mm$ size for gratifying the requested specifications and the multilayer ceramic SMD(surface mounted device) package technology. The VCXO wired with the PECL(positive emitter coupled logic) package take place a stray inductance and a parasitic capacitance by the length and the inner pattern of the VCXO and the amplitude attenuation and signal loss due to the reflection of power source and the noise component. We have developed the Zig system to analyze the precise spectrum and evaluate the performance. The basic operating voltage is the 3.3 V and have the frequency range of 120MHz-180MHz. The Q factor is over 5K and it has the low jitter characteristics of 3.5 ps and low phase noise.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.274-280
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• 2007

This paper demonstrates an efficiency improvement of the class E power amplifier (PA) by tuning-out the input capacitance ($C_{IN}$) of the power HBT with a shunt inductance. In order to obtain high output power, the PA needs the large emitter size of a transistor. The larger the emitter size, the higher the parasitic capacitance. The parasitic $C_{IN}$ affects the distortion of the voltage signal at the base node and changes the duty cycle to decrease the PA's efficiency. Adopting the L-C resonance, we obtain a remarkable efficiency improvement of as much as 7%. This PA exhibits output power of 29 dBm and collector efficiency of 71% at 1.9 GHz.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.381-384
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• 2000

In this paper, we designed and fabricated a low noise amplifier which can be used in W-CDMA. For improving input VSWR and stability an emitter inductance series feedback was used, and for acquiring higer linearity at low current DC bais by-passing method was used. Fabricated low noise amplifier had 15.33 ㏈ power gain, 2.17 ㏈ NF, -9.53 ㏈ $S_{11}$ and -35.91 ㏈ $S_{22}$ at 2.16 GHz, and +5.34 ㏈m II $P_{ 3}$ at 10 MHz channel spacing.g.g.g.

• Proceedings of the KIEE Conference
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• 1996.11a
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• pp.346-349
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• 1996

In application of high power IGBT PWM inverters, the treatable power range is considerably limited due to the overvoltage caused by the stray inductance components within the power circuit. This paper proposes a new gate drive circuit for IGBTs which can actively suppress the overvoltage across the driven IGBT at turn-off and the overvoltage across the opposite IGBT at turn-on while preserving the most simple and reliable power circuit. The turn-off driving scheme has adaptive feature to the amplitude of collector current, so that the overvoltage is limited much effectively at the larger collector current. The turn-on scheme is to decrease the rising rate of the collector current by increasing input capacitance during turn-on transient when the gate-emitter voltage is greater than threshold voltage. The experimental results under various normal and fault conditions prove the effectiveness of the proposed circuit.