• IEMEK Journal of Embedded Systems and Applications
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• v.2 no.2
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• pp.123-127
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• 2007

Through USN field Test Projects launched in 2005, 9 USN application service models such as u-Ocean, u-Construction, u-Farm, u-Hospital has been deployed. We conducted technical, industrial, economical feasibility tests to verify those services. This thesis will cover briefly the current situation of USN industry domestically and internationally. It will show the future prospect of convergence service model based on USN in conjunction with research details and results from previous USN field Test Projects.

• KIPS Transactions on Software and Data Engineering
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• v.9 no.8
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• pp.229-234
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• 2020

This paper presents the design and the implementation of CRESTIVE-DX, a concolic testing tool that distribute the concolic testing process over the embedded target system and the host system for efficient test generation of a target embedded program. CRESTIVE-DX conducts the execution of a target program on the target embedded system to consider possible machine-dependent behaviors of a target program execution, and conducts machine-independent parts, such as search-strategy heuristics, constraint solving, on host systems with high-speed computation unit, and coordinates their concurrent executions. CRESTIVE-DX is implemented by extending an existing concolic testing tool for C programs CREST. We conducted experiments with a test bed that consists of an embedded target system in the Arm Cortex A54 architecture and host systems in the x86-64 architecture. The results of experiments with Unix utility programs Grep, Busybox Awk, and Busybox Ed show that test input generation of CRESTIVE-DX is 1.59 to 2.64 times faster than that of CREST.

• Journal of Korean Association for Spatial Structures
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• v.15 no.2
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• pp.79-86
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• 2015

This study investigated the embedded depth of guardrail posts through 3-D soil material model and carried out evaluation of the dynamic performance of guard rail. In order to calculate for embedded depth of sloping ground, displacement of guardrail posts is analyzed according to the embedded depth of experiment variables. Through the static test of guardrail posts, the maximum deflection was found to decrease the interval. By performing the dynamic test using the Bogie Car, that is confirmed the elastic modulus of the soil occuring the maximum deflection. Guardrail posts is considered to need for further reinforcement in the larger slope than the plains. This study researched about maximum displacement and deviation velocity through dynamic performance of guardrail system and conducted analysis about protection performance evaluation of passenger.

• Steel and Composite Structures
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• v.23 no.4
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• pp.409-420
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• 2017

This paper theoretically studies the cyclic behavior of hybrid connections between steel coupling beams and concrete shear walls with embedded steel columns. Finite element models of connections with long and short embedded steel columns are built in ABAQUS and validated against the test results in the companion paper. Parametric studies are carried out using the validated FE model to determine the key influencing factors on the load-bearing capacity of connections. A close-form solution of the load-bearing capacity of connections is proposed by considering the contributions from the compressive strength of concrete at the interface between the embedded beam and concrete, shear yielding of column web in the tensile region, and shear capacity of column web and concrete in joint zone. The results show that the bond slip between embedded steel members and concrete should be considered which can be simulated by defining contact boundary conditions. It is found that the loadbearing capacity of connections strongly depends on the section height, flange width and web thickness of the embedded column. The accuracy of the proposed calculation method is validated against test results and also verified against FE results (with differences within 10%). It is recommended that embedded steel columns should be placed along the entire height of shear walls to facilitate construction and enhance the ductility. The thickness and section height of embedded columns should be increased to enhance the load-bearing capacity of connections. The stirrups in the joint zone should be strengthened and embedded columns with very small section height should be avoided.

• The KIPS Transactions:PartA
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• v.16A no.4
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• pp.245-254
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• 2009

With the increasing adoption of embedded processors, the need of developing compilers for the embedded processors with timely manner is also growing. Retargeting has been adopted as a viable approach to constructing new compilers by modifying the back-end of an existing compiler. This paper proposes a test suite generation system for testing retargetable C compilers. The proposed system generates the test suite using the grammar coverage concept. Generally, the size of the test suite satisfying the grammar coverage of the source language is very large. Hence, the proposed system also provides the facility to reduce the size of the test suite. According to the experimental result, the reduced test suite can detect 75% of the compiler faults detected by the original test suite though the size of the reduced test suite is only 10% of that of the original test suite in average. This result indicates that the reduction technique proposed in this paper can be effectively used in the prior phase of the development procedure of the embedded compilers.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.3
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• pp.437-443
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• 2007

In this paper, we propose the power-aware test framework for Network-on-Chip, which is based on embedded processor and on-chip network. First, the possibility of using embedded processor and on-chip network isintroduced and evaluated with benchmark system to test the other embeddedcores. And second, a new generation method of test pattern is presented to reduce the power consumption of on-chip network, which is called don't care mapping. The experimental results show that the embedded processor can be executed like the automatic test equipments, and the test time is reduced and the power consumption is reduced up to 8% at the communication components.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.6
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• pp.2139-2151
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• 2014

Embedded system testing, especially long-term reliability testing, of flash memory solutions such as embedded multi-media card, secure digital card and solid-state drive involves strategic decision making related to test sample size to achieve high test coverage. The test sample size is the number of flash memory devices used in a test. Earlier, there were physical limitations on the testing period and the number of test devices that could be used. Hence, decisions regarding the sample size depended on the experience of human testers owing to the absence of well-defined standards. Moreover, a lack of understanding of the importance of the sample size resulted in field defects due to unexpected user scenarios. In worst cases, users finally detected these defects after several years. In this paper, we propose that a large number of potential field defects can be detected if an adequately large test sample size is used to target weak features during long-term reliability testing of flash memory solutions. In general, a larger test sample size yields better results. However, owing to the limited availability of physical resources, there is a limit on the test sample size that can be used. In this paper, we address this problem by proposing a self-adaptive reliability testing scheme to decide the sample size for effective long-term reliability testing.

• IEMEK Journal of Embedded Systems and Applications
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• v.3 no.1
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• pp.19-24
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• 2008

To reduce time-to-market, more and more embedded system developers and system-on-chip designers rely on microprocessor-based design methodology. ARM processor has been a major player in this industry over the last 10 years. However, there are many restrictions on developing embedded software using ARM processor in the early design stage. For those who are not familiar with embedded software development environment or who cannot afford to have an expensive embedded hardware equipment, testing their software on a real ARM hardware platform is a challenging job. To overcome such a problem, we have designed VMA (Virtual ARM Machine), which offers easier testing and debugging environment to ARM based embedded system developers. Major benefits that can be achieved by utilizing a virtual ARM platform are (1) reducing development cost, (2) lowering the entrance barrier for embedded system novices, and (3) making it easier to test and debug embedded software designs. Unlike many other purely software-oriented ARM simulators which are independent of real hardware platforms, VMA is specifically targeted on SYS-Lab 5000 ARM hardware platform, (designed by Libertron, Inc.), which means that VMA imitates behaviors of embedded software as if the software is running on the target embedded hardware as closely as possible. This paper will describe how VMA is designed and how VMA can be used to reduce design time and cost.

• Journal of the Korea Society for Simulation
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• v.25 no.1
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• pp.35-43
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• 2016

Increasing the proportion of an embedded system in automotive industry, test methods for evaluation and fault detection of the embedded system have been researched. HILS is a test method that is used in the development and test of complex real-time embedded systems. In this study, we defined the HILS method of the ECU, one of the embedded systems used in automobiles. Our method is to create a test model that can provide a virtual vehicle environment to the ECU on the basis of the actual vehicle data. The test model has reference information that can transmit the sensor signal and CAN Message into the ECU from HILS tester. In this study, the HILS can detect faults of the target ECU.

• Steel and Composite Structures
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• v.36 no.1
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• pp.103-118
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• 2020

The static behavior of grouped large-headed studs (d = 30 mm) embedded in ultra-high performance concrete (UHPC) was investigated by conducting push-out tests and numerical analysis. In the push-out test, no splitting cracks were found in the UHPC slab, and the shank failure control the shear capacity, indicating the large-headed stud matches well with the mechanical properties of UHPC. Besides, it is found that the shear resistance of the stud embedded in UHPC is 11.4% higher than that embedded in normal strength concrete, indicating that the shear resistance was improved. Regarding the numerical analysis, the parametric study was conducted to investigate the influence of the concrete strength, aspect ratio of stud, stud diameter, and the spacing of stud in the direction of shear force on the shear performance of the large-headed stud. It is found that the stud diameter and stud spacing have an obvious influence on the shear resistance. Based on the test and numerical analysis results, a formula was established to predict the load-slip relationship. The comparison indicates that the predicted results agree well with the test results. To accurately predict the shear resistance of the stud embedded in UHPC, a design equation for shear strength is proposed. The ratio of the calculation results to the test results is 0.99.