• Journal of Internet Computing and Services
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• v.22 no.2
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• pp.59-68
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• 2021

As artificial intelligence(AI) technologies, which have made rapid growth recently, began to be applied to the marine environment such as ships, there have been active researches on the application of CNN-based models specialized for digital videos. In E-Navigation service, which is combined with various technologies to detect floating objects of clash risk to reduce human errors and prevent fires inside ships, real-time processing is of huge importance. More functions added, however, mean a need for high-performance processes, which raises prices and poses a cost burden on shipowners. This study thus set out to propose a method capable of processing information at a high rate while maintaining the accuracy by applying Quantization techniques of a deep learning model. First, videos were pre-processed fit for the detection of floating matters in the sea to ensure the efficient transmission of video data to the deep learning entry. Secondly, the quantization technique, one of lightweight techniques for a deep learning model, was applied to reduce the usage rate of memory and increase the processing speed. Finally, the proposed deep learning model to which video pre-processing and quantization were applied was applied to various embedded boards to measure its accuracy and processing speed and test its performance. The proposed method was able to reduce the usage of memory capacity four times and improve the processing speed about four to five times while maintaining the old accuracy of recognition.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.5
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• pp.467-474
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• 2019

In this paper, we propose a novel method to improve FPS while maintaining the accuracy of YOLO v2 model in NVIDIA Jetson TX1. In general, in order to reduce the amount of computation, a conversion to an integer operation or reducing the depth of a network have been used. However, the accuracy of recognition can be deteriorated. So, we use methods to reduce computation and memory consumption through adjustment of the filter size and integrated computation of the network The first method is to replace the $3{\times}3$ filter with a $1{\times}1$ filter, which reduces the number of parameters to one-ninth. The second method is to reduce the amount of computation through CBR (Convolution-Add Bias-Relu) among the inference acceleration functions of TensorRT, and the last method is to reduce memory consumption by integrating repeated layers using TensorRT. For the simulation results, although the accuracy is decreased by 1% compared to the existing YOLO v2 model, the FPS has been improved from the existing 3.9 FPS to 11 FPS.

• The KIPS Transactions:PartC
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• v.10C no.5
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• pp.585-594
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• 2003

Java card is one of promising smart card platform with java technology. Java card defines necessary packages and classes for Embedded device that have small memory such as smart card Jana card is compatible with EMV that is Industry specification standard and ISO-7816 that is international standard. However, Java card is not offers user authentication protocol. In this paper, We design and implement an user authentication protocol applicable wireless devices based on Java Card using standard 3GPP Specification (SMS), Java Card Specification (APDU), Cryptography and so on. Our Java Card user authentication techniques can possibly be applied to the area of M-Commerce, Wireless Security, E-Payment System, Mobile Internet, Global Position Service, Ubiquitous Computing and so on.

• KIPS Transactions on Computer and Communication Systems
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• v.9 no.10
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• pp.213-220
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• 2020

The power consumption and performance of hardware-based mobile and IoT embedded systems that require high specifications are one of the important issues of these systems. In particular, the problem of excessive power consumption is because it causes a problem of increasing heat generation and shortening the life of the device. In addition, in the same environment, software also needs to perform stable operation in limited power and memory, thereby increasing power consumption of the device. In order to solve these issues, we propose a Low level power improvement via identifying performance dissipation. The proposed method identifies complex modules (especially Cyclomatic complexity, Coupling & Cohesion) through code visualization, and helps to simplify low power code patterning and performance code. Therefore, through this method, it is possible to optimize the quality of the code by reducing power consumption and improving performance.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.41 no.1
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• pp.25-32
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• 2004

Nowadays image processing is very useful for some field of traffic applications. The one reason is we can construct the system in a low price, the other is the improvement of hardware processing power, it can be more fast to processing the data. In traffic field, the development of image using system is interesting issue. Because it has the advantage of price of installation and it does not obstruct traffic during the installation. In this study, 1 propose the traffic monitoring system that implement on the embedded system environment. The whole system consists of two main part, one is host controller board, the other is image processing board. The part of host controller board take charge of control the total system interface of external environment, and OSD(On screen display). The part of image processing board takes charge of image input and output using video encoder and decoder, Image classification and memory control of using FPGA, control of mouse signal. And finally, for stable operation of host controller board, uC/OS-II operating system is ported on the board.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.221-221
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• 2013

Striving to replace the well known silicon nanocrystals embedded in oxides with solution-processable charge-trapping materials has been debated because of large scale and cost effective demands. Herein, a silicon quantum dot-polystyrene nanocomposite (SiQD-PS NC) was synthesized by postfunctionalization of hydrogen-terminated silicon quantum dots (H-SiQDs) with styrene using a thermally induced surface-initiated polymerization approach. The NC contains two miscible components: PS and SiQD@PS, which respectively are polystyrene and polystyrene chains-capped SiQDs. Spin-coated films of the nanocomposite on various substrate were thermally annealed at different temperatures and subsequently used to construct metal-insulator-semiconductor (MIS) devices and thin film field effect transistors (TFTs) having a structure p-$S^{++}$/$SiO_2$/NC/pentacene/Au source-drain. C-V curves obtained from the MIS devices exhibit a well-defined counterclockwise hysteresis with negative fat band shifts, which was stable over a wide range of curing temperature ($50{\sim}250^{\circ}C$. The positive charge trapping capability of the NC originates from the spherical potential well structure of the SiQD@PS component while the strong chemical bonding between SiQDs and polystyrene chains accounts for the thermal stability of the charge trapping property. The transfer curve of the transistor was controllably shifted to the negative direction by chaining applied gate voltage. Thereby, this newly synthesized and solution processable SiQD-PS nanocomposite is applicable as charge trapping materials for TFT based memory devices.

• The Journal of the Acoustical Society of Korea
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• v.19 no.7
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• pp.42-47
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• 2000

This paper describes a real-time implementation of a GSM-EFR (Global System for Mobil communications Enhanced Full Rate) speech coder using OakDSP core; a 16bit fixed-point Digital Signal Processor (DSP) by DSP Group, Inc. The real-time implemented speech coder required about 24MIPS for computation and 7.06K words and 12.19K words for code and data memory, respectively. The implemented GSM-EFR speech coder passes all of test vectors provided by ETSI (European Telecommunication Standard Institute), and perceptual speech quality measurement using MNB algorithm shows that the quality of the GSM-EFR speech coder is similar to the one of 32kbps ADPCM. The real-time implemented GSM-EFR speech coder which is the highest bit-rate mode of the GSM-AMR speech coder will be used as the basic structure of the GSM-AMR speech coder which is embedded in MODEM ASIC of IMT2000 asynchronous mode mobile station.

• Journal of the Korea Computer Industry Society
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• v.6 no.5
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• pp.757-766
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• 2005

There have been great demands for higher density SRAM in all area of SRAM applications, such as mobile, network, cache, and embedded applications. Therefore, aggressive shrinkage of 6T Full CMOS SRAM had been continued as the technology advances, However, conventional 6T Full CMOS SRAM has a basic limitation in the cell size because it needs 6 transistors on a silicon substrate compared to 1 transistor in a DRAM cell. The typical cell area of 6T Full CMOS SRAM is $70{\sim}90F^{2}$, which is too large compared to $8{\sim}9F^{2}$ of DRAM cell. With 80nm design rule using 193nm ArF lithography, the maximum density is 72M bits at the most. Therefore, pseudo SRAM or 1T SRAM, whose memory cell is the same as DRAM cell, is being adopted for the solution of the high density SRAM applications more than 64M bits. However, the refresh time limits not only the maximum operation temperature but also nearly all critical electrical characteristics of the products such as stand_by current and random access time. In order to overcome both the size penalty of the conventional 6T Full CMOS SRAM cell and the poor characteristics of the TFT load cell, we have developed $S^{3}$ cell. The Load pMOS and the Pass nMOS on ILD have nearly single crystal silicon channel according to the TEM and electron diffraction pattern analysis. In this study, we present $S^{3}$ SRAM cell technology with 100nm design rule in further detail, including the process integration and the basic characteristics of stacked single crystal silicon TFT.

• Proceedings of the Korea Contents Association Conference
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• 2009.05a
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• pp.687-692
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• 2009

This paper presents the development of RFID educational system based on 900MHz air interface between the reader and the active tag. The software of reader and the active tag is developed on embedded environment, and the software of PC controlling the reader is based on window OS operated as the server. The ATmega128 VLSI chip is used for the processor of the reader and the active tag. As the development environment, AVR compiler is used for the reader and the active tag of which the programming language is C. The visual C++language of the visual studio on the PC activated as the server is used for development language. Main functions of this system are to control tag containing EPC global Data by PC through the reader, to obtain information of tag through the internet and to read/write data on tag memory. Software design of 900MHz RFID/USN educational system is done on the basis of these functions.

• The KIPS Transactions:PartD
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• v.12D no.3 s.99
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• pp.335-344
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• 2005

Recently open data mining methods focusing on a data stream that is a massive unbounded sequence of data elements continuously generated at a rapid rate are proposed actively. Knowledge embedded in a data stream is likely to be changed over time. Therefore, identifying the recent change of the knowledge quickly can provide valuable information for the analysis of the data stream. This paper proposes a sliding window technique for finding recently frequent itemsets, which is applied efficiently in open data mining. In the proposed technique, its memory usage is kept in a small space by delayed-insertion and pruning operations, and its mining result can be found in a short time since the data elements within its target range are not traversed repeatedly. Moreover, the proposed technique focused in the recent data elements, so that it can catch out the recent change of the data stream.