• Title/Summary/Keyword: Embedded Hardware

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FPGA Modem Platform Design for eHSPA and Its Regularized Verification Methodology (eHSPA 규격을 만족하는 FPGA모뎀 플랫폼 설계 및 검증기법)

  • Kwon, Hyun-Il;Kim, Kyung-Ho;Lee, Chung-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.24-30
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    • 2009
  • In this paper, the FPGA modem platform complying with 3GPP Release 7 eHSPA specifications and its regularized verification flow are proposed. The FFGA platform consists of modem board supporting physical layer requirements, MCU and DSP core embedded control board to drive the modem board, and peripheral boards for RF interfacing and various equipment interfaces. On the other hand, the proposed verification flow has been regularized into three categories according to the correlation degrees of hardware-software inter-operation, such as simple function test, scenario test call processing and system-level performance test. When it comes to real implementations, the emulation verification strategy for low power mobile SoC is also introduced.

The Compressed Instruction Set Architecture for the OpenRISC Processor (OpenRISC 프로세서를 위한 압축 명령어 집합 구조)

  • Kim, Dae-Hwan
    • Journal of the Korea Society of Computer and Information
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    • v.17 no.10
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    • pp.11-23
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    • 2012
  • To achieve efficient code size reduction, this paper proposes a new compressed instruction set architecture for the OpenRISC architecture. The new instructions and their corresponding formats are designed by the profiling information of the existing instruction usage. New 16-bit instructions and 32-bit instructions are proposed to compressed the existing 32-bit instructions and instruction sequences, respectively. The proposed instructions can be classified into three types. The first is the new 16-bit instructions for the frequent normal 32-bit instructions such as add, load, store, branch, and jump instructions. The second type is the new 32-bit instructions for the consecutive two load instructions, two store instructions, and 32-bit data mov instructions. Finally, two new 32-bit instructions are proposed to compress function prolog and epilog code, respectively. OpenRISC hardware decoder is extended to support the new instructions. Experiments show that the efficiency of code size reduction improves by an average of 30.4% when compared to the OR1200 instruction set architecture without loss of execution performance.

A Study on Gait Imbalance Estimation System using 3-axis Accelerometer (3축 가속도 센서를 이용한 보행 불균형 평가 시스템에 관한 연구)

  • Choi, C.H.;Park, Y.D.;Sim, H.M.;Lee, S.M.
    • Journal of rehabilitation welfare engineering & assistive technology
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    • v.9 no.1
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    • pp.37-43
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    • 2015
  • In this paper, an efficient system using 3-axis accelerometer is proposed to diagnose the gait imbalance. The proposed hardware system consists of two 3-axis accelerometers to measure 3 directional acceleration of ankles and an embedded system to transfer the data. The acquired data were normalized and then compared to analyze the symmetry between normal and abnormal gait with ROCC (ratio of correlation coefficient). 10 healthy subjects were participated and each subject repeated the experiment 5 times. To make unbalanced ambulation, the height of the heel of one foot was changed during experiments. From the results, it is verified that ROCC index grew apart from the reference according to growing imbalance and the proposed system could be available for estimation of gait imbalance.

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Design and Implementation of Web Service S/W Platform for Remote Monitoring and Control (원격 감시제어를 위한 웹 서비스 S/W 플랫폼 설계 및 구현)

  • Lee, Tae-Hee;Kim, Joo-Man
    • The Journal of the Korea Contents Association
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    • v.7 no.12
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    • pp.245-253
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    • 2007
  • In this paper, we propose an effective web service software platform for remote monitoring and control. We removed the servlet container for better web service performance so as to improve the gSOAP processing which is an essential element of web service implementation. Furthermore, we designed the web service server/client software platform which can be applied to robot or ubiquitous sensor applications. For validation of this study we tested it by manufacturing robot hardware for monitoring control which combined tanks and sensors on a LDS4000 engine board mounted with a PXA270 processor. The practical excellence and the efficiency of the result of this study was validated by the comparison of gSOAP message exchange load between the web service client application and the conventional remote monitoring control technique through a web server.

Development of a Decompiler for Verification and Analysis of an Intermediate Code in ANSI C Compiler (ANSI C 컴파일러에서 중간코드의 검증과 분석을 위한 역컴파일러의 개발)

  • Kim, Young-Keun;Kwon, Hyeok-Ku;Lee, Yang-Sun
    • Journal of Korea Multimedia Society
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    • v.10 no.3
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    • pp.411-419
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    • 2007
  • Mounted on mobile device, set-top box, or digital TV, EVM is a virtual machine solution that can download and execute dynamic application programs. And the SIL(Standard Intermediate Language) is intermediate language of the EVM, which has a set of opcodes for object-oriented language and a sequential language. Since the C compiler used on each platform depends on the hardware, it converts C program to objective code, and then executes. To solve this problem, our research team developed ANSI C compiler and the EVM. Our ANSI C compiler outputs the SIL code based on stack machine. This paper presents the SIL-to-C decompiler in which converts the SIL code to three address code. Thus, the decompiler allows us to verify SIL code created by ANSI C compiler, and analyze a program from C language source level.

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Implementation of the Traffic Control System based Low Cost Dual Modular Redundancy (저비용 이중화 시스템 기반 교통신호제어 (시스템) 구현)

  • Lee, Dong-Woo;Na, Jong-Whoa;Kim, Nam-Sun
    • Journal of Advanced Navigation Technology
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    • v.21 no.5
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    • pp.491-500
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    • 2017
  • This paper investigates a low cost dual modular redundancy system based on heartbeat which can be applied to traffic control signal system. Failure of the traffic control signal system can cause traffic confusion and traffic accidents. Therefore safety and reliability of traffic control should be secured using fault tolerance technology. To do this, we configured a redundant board using the open source hardware and the heartbeat technique of Linux HA. The function of the traffic signal control system was verified and the fault recovery time was measured using fault injection test. As a result of the test, the fault recovery time was confirmed to be less than 9 seconds on average, confirming that the reliability target time is satisfied. Based on the results of this study, it is expected that it can be applied to fields requiring high reliability systems such as aviation, space, and nuclear power embedded systems.

Block Associativity Limit Scheme for Efficient Flash Translation Layer (효율적인 플래시 변환 계층을 위한 블록 연관성 제한 기법)

  • Ok, Dong-Seok;Lee, Tae-Hoon;Chung, Ki-Dong
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.6
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    • pp.673-677
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    • 2010
  • Recently, NAND flash memory has been widely used in embedded systems, personal computers, and server systems because of its attractive features, such as non-volatility, fast access speed, shock resistance, and low power consumption. Due to its hardware characteristics, specifically its 'erase-before-write' feature, Flash Translation Layer is required for using flash memory like hard disk drive. Many FTL schemes have been proposed, but conventional FTL schemes have problems such as block thrashing and block associativity problem. The KAST scheme tried to solve these problems by limiting the number of associations between data block and log block to K. But it has also block thrashing problem in random access I/O pattern. In this paper, we proposed a new FTL scheme, UDA-LBAST. Like KAST, the proposed scheme also limits the log block association, but does not limit data block association. So we could minimize the cost of merge operations, and reduce merge costs by using a new block reclaim scheme, log block garbage collection.

TMMi Level 5 Quality Control Process Implementation Strategy (TMMi 레벨 5 품질 관리 프로세스 구축 방안)

  • Choi, Seunghee;Kim, Harksoo;Lee, Gooyeon
    • Journal of KIISE:Software and Applications
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    • v.41 no.8
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    • pp.533-544
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    • 2014
  • The hardware-based software has been loaded in almost all industrial fields including the embedded system field. As it is increasingly important to control product quality, the more businesses are expending great quality cost. However, most domestic corporations in Korea are bent on spending more money solving problems caused by poor quality rather than prevention of quality loss cost. Therefore, it's time to improve to use quality prevention cost efficiently. As for this, there has been a growing interest in controlling quantitative quality, but the managing activities for quantitative quality require a high maturity process, belonging to Level 4 and 5. So it is necessary that statistical quality control activities should be fulfilled. This study introduces various measures to build up quality control among the process areas of TMMi Level 5 to help establish the high maturity test processes of statistical quality control.

The Design and Implementation of Sensor Data Processing Module Based on TinyOS Utilizing TinyDB and LineTracer (TinyDB와 라인트레이서를 활용한 TinyOS기반의 센서 데이터 처리 모듈 설계 및 구현)

  • Lee, Sang-Hoon;Moon, Seung-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.10B
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    • pp.883-890
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    • 2006
  • The study of sensor network database is beginning to liven up as we are interested in Ubiquitous Computing technology in hardware, communication, database and so on. Especially, as new smart sensors have capabilities of real-time information gathering and analysis of each sensor node, data processing becomes an important issue in Ubiquitous Computing. In thesis, we have applied TinyDB(query processing system) to carry sensor node with line tracer which can follow the fixed path. After we gathered data around path, we have processed data in TinyDB GUI, gathered data, displayed data on a web server. Also we have a web browser on an embedded board for convenient user interface and implemented touch screen such that users can operate with a finger.

A Development of Real Time Video Compression System Based on Embedded Motion JPEG 2000 Using ADV212 and FPGA (ADV212와 FPGA를 이용한 임베디드 기반 실시간 Motion JPEG 2000 영상부·복호화 시스템 개발)

  • Yu, Jae Taeg;Ra, Sung Woong;Hyun, Myung Han
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.43 no.8
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    • pp.748-756
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    • 2015
  • In this paper, we developed a miniaturized real time video compression system satisfying the military environment using ADV212 and FPGA. We present an efficient hardware design scheme for the weight reduction of the device and also a software solution to deal with noisy image signals. Experimental results show that the frame delay is reduced by a factor of 2 or 3 and the device's weight is decreased by a factor of 6 to 7. In order to prove the reliability for the military usage of this development, we examine the environmental test (MIL-STD-810G) and EMI test (MIL-STD-461F). Experimental results show that the developed system satisfies the requirements.