• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.388-388
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• 2012

In this letter, We have investigated cell characteristics of the alloy FePt-NDs charge trapping memory capacitors with high-k $Al_2O_3$ dielectrics as a blocking oxide. The capacitance versus voltage (C-V) curves obtained from a representative MOS capacitor embedded with FePt-NDs synthesized by the post deposition annealing (PDA) treatment process exhibit the window of flat-band voltage shift, which indicates the presence of charge storages in the FePt-NDs. It is shown that NDs memory with high-k $Al_2O_3$ as a blocking oxide has performance in large memory window and low leakage current when the diameter of ND is below 2 nm. Moreover, high-k $Al_2O_3$ as a blocking oxide increases the electric field across the tunnel oxide, while reducing the electric field across the blocking layer. From this result, this device can achieve lower P/E voltage and lower leakage current. As a result, a FePt-NDs device with high-k $Al_2O_3$ as a blocking oxide obtained a~7V reduction in the programming voltages with 7.8 V memory.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.437-438
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• 2007

In this paper a embedded decoupling capacitor design with gap structure will be discussed. A novel structure is modeling and analization by High Frequency Structure Simulator (HFSS). Proposed capacitor have $2m{\times}2m$ in rectangular shape. The film thickness of copper/dielectric film/substrate is respectively 35um/20um/35um. A dielectric layer of BaTiO3/epoxy has the relative permittivity of 25. Compare of the planar decoupling capacitor, capacitance densities of this structure in the range of $55{\mu}F$/mm2 have been obtained with 50um gap while capacitance densities of planar structure $55{\mu}F$/mm2 in the same size. The frequency dependent behavior of capacitors is numerically extracted over a wide frequency bandwidth 500MHz-7GHz. The decoupling capacitor can work at high frequency band increasing the gap size.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.339-339
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• 2007

Metal coating on ceramic powder has long been attracting interest for various applications such as superconductor where the brittle nature of high temperature ceramic superconductor was complemented by silver coating and metalloceramics where mechanical property improvement was achieved via electroless plating. More recently it has become of great interest in embedded passive device applications since metal coating on ceramic particles may result in the enhancement of the dielectric properties of ceramic-polymer composite capacitors. In our study, nickel ion-containing solution was used for coating commercial capacitor-grade $BaTiO_3$ powder. After filtering process, the powder was dried and heat-treated in 5% forming gas at $900^{\circ}C$. XRD and TEM were utilized for the observation of crystallization behavior and morphology of the particles. It was found that the nickel coating characteristics were strongly dependent on the several parameters and processing variables, such as starting $BaTiO_3$ particle size, nickel source, solution chemistry, coating temperature and time. In this paper, the effects of these variables on the coating characteristics will be presented in some detail.

• Korean Journal of Materials Research
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• v.18 no.10
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• pp.542-546
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• 2008

$BaTiO_3$/epoxy composites can be applied as the dielectric materials for embedded capacitors. The effects of the degree of $BaTiO_3$ particle agglomeration on the dielectric properties of $BaTiO_3$/epoxy composites were investigated in the present study. The degree of particle agglomeration was controlled by the milling of the agglomerated particles. The size and content of the agglomerated $BaTiO_3$ particles decreased with an increase in the milling time. The dielectric constants and polarizations of $BaTiO_3$/epoxy composites abruptly decreased with the increase of the milling time. It was concluded that the dielectric constants and polarizations of $BaTiO_3$/epoxy composites decreased as the degree of particle agglomeration decreased. The degree of agglomeration of $BaTiO_3$ particles turned out to be a very influential factor on the dielectric properties of $BaTiO_3$/epoxy composites.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.1
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• pp.31-38
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• 2003

In the current electronic technology atmosphere, MEMS (Microelectromechanical System) technology is regarded as one of promising device manufacturing technologies to realize market-demanding device properties. In the packaging of MEMS devices, the packaged structure must maintain hermeticity to protect the devices from a hostile atmosphere during their operations. For such MEMS device vacuum packaging, we introduce the LTCC (Low temperature Cofired Ceramic) packaging technology, in which embedded passive components such as resistors, capacitors and inductors can be realized inside the package. The technology has also the advantages of the shortened length of inner and surface traces, reduced signal delay time due to the multilayer structure and cost reduction by more simplified packaging processes owing to the realization of embedded passives which in turn enhances the electrical performance and increases the reliability of the packages. In this paper, the leakage rate of the LTCC package having several interfaces was measured and the possibility of LTCC technology application to MEMS devices vacuum packaging was investigated and it was verified that improved hermetic sealing can be achieved for various model structures having different types of interfaces (leak rate: stacked via; $4.1{\pm}1.11{\times}10^{-12}$/ Torrl/sec, LTCC/AgPd/solder/Cu-tube; $3.4{\pm}0.33{\times}10^{-12}$/ Torrl/sec). In real application of the LTCC technology, the technology can be successfully applied to the vacuum packaging of the Infrared Sensor Array and the images of light-up lamp through the sensor way in LTCC package structure was presented.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.1-7
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• 1999

We developed Fabrication process of embedded passive components in MCM-D substrate. The proposed MCM-D substrate is based on Cu/photosensitive BCB multilayer. The substrate used is Si wafer and Ti/cu metallization is used to form the interconnect layer. Interconnect layers are formed with 1000$\AA$ Ti/3000$\AA$ Cu by sputtering method and 3$\mu\textrm{m}$ Cu by electrical plating method. In order to form the vias in photosensitive BCB layer, the process of BCB and plasma etch using $C_2F_6$ gas were evaluated. The MCM-D substrate is composed of 5 dielectric layers and 4 interconnect layers. Embedded resistors are made with NiCr and implemented on the $2^{nd}$ dielectric layer. The sheet resistance of NiCr is controlled to be about 21 $\Omega$/sq at the thickness of 600$\AA$. The multi-turn sprial inductors are designed in coplanar fashion on the $4^{th}$ interconnect layer with an underpass from the center to outside using the lower $3^{rd}$ interconnect layer. Capacitors are designed and realized between $1^{st}$ interconnect layer and $2^{nd}$ interconnect layer. An important issue in capacitor is the accurate determination of the dielectric thickness. We use the 900$\AA$ thickness of PECVD silicon nitride film as dielectric. Capacitance per unit area is about 88nF/$\textrm {cm}^2$at the thickness of 900$\AA$. The advantage of this integration process is the compatibility with the conventional semiconductor process due to low temperature PECVD silicon nitride process and thermal evaporation NiCr process.

• Korean Journal of Materials Research
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• v.19 no.11
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• pp.576-580
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• 2009

$BaTiO_3$/epoxy composites have been widely investigated as promising materials for embedded capacitors in printed circuit boards. It is generally known that the dielectric constant (K) of the $BaTiO_3$/epoxy composites increases with improvement of the dispersion of $BaTiO_3$ particles in the epoxy matrix that comes from adding surfactant. The influences of surfactant addition on the dielectric properties of the $BaTiO_3$/epoxy composites are reported in the present study. The dielectric constant of the $BaTiO_3$/epoxy composites is not significantly affected by the surfactant addition. However, the temperature coefficient of capacitance increases and the peel strength decreases as the amount of added surfactant increases. The influences of surfactant addition on the dielectric properties of the neat epoxy are also very similar to those of the $BaTiO_3$/epoxy composites. The residual surfactant in the $BaTiO_3$/epoxy composites affects the temperature coefficient of capacitance and the peel strength of the epoxy matrix, which in turn affects the temperature coefficient of capacitance and the peel strength of the $BaTiO_3$/epoxy composites.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.03a
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• pp.21-21
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• 2010

(Ba,Sr)$TiO_3$ (BST) thin film with a perovskite structure has potential for the practical application in various functional devices such as nonvolatile-memory components, capacitor, gate insulator of thin-film transistors, and electro-optic devices for display. Normally, the BST thin films derived from sol-gel and sputtering are amorphous or partially crystalline when processed below $600^{\circ}C$. For the purpose of integrating BST thin film directly into a Si-based read-out integrated circuit (ROIC), it is necessary to process the BST film below $400^{\circ}C$. The microstructural and electrical properties of low-temperature crystallized BST film were studied. The BST thin films have been fabricated at $350^{\circ}C$ by UV-assisted rapidly thermal annealing (RTA). The BST films are in a single perovskite phase and have well-defined electrical properties such as high dielectric constant, low dielectric loss, low leakage current density, and high breakdown voltage. Photoexcitation of the organics contained in the sol-gel-derived films by high-intensity UV irradiation facilitates elimination of the organics and formation of the single-crystalline phase films at low temperatures. The amorphous BST thin film was transformed to a highly (h00)-oriented perovskite structure by high oxygen pressure processing (HOPP) at as low as $350^{\circ}C$. The dielectric properties of BST film were comparable to (or even better than) those of the conventionally processed BST films prepared by sputtering or post-annealing at temperature above $600^{\circ}C$. When external pressure was applied to the well-known contractive BST system during annealing, the nucleation energy barrier was reduced; correspondingly, the crystallization temperature decreased. The UV-assisted RTA and HOPP, as compatible with existing MOS technology, let the BST films be integrated into radio-frequency circuit and mixed-signal integrated circuit below the critical temperature of $400^{\circ}C$.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.685-688
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• 2005

An efficient sustain driver and a useful reset circuit composition technique are proposed for plasma display panel drive. The proposed sustain driver uses a series resonance between an external inductor and a panel to recover the energy dissipated by a capacitive displacement current of PDP. It consists of four switching devices, an inductor, and external capacitors, which supply sustain voltage sources. Although the amplitude of an input voltage source is twice as high as that of conventional sustain drivers, average voltage stress imposed on power switching devices is nearly same in their values. Moreover, the input voltage source can be directly applied for the use of a reset voltage source. Owing to this scheme, the proposed sustain driver and the embedded reset circuit have a simple configuration. The operational principle and design example are given with theoretical analyses. The validity of the proposed drive system is verified through experiments using a prototype equipped with a 7.5-inch-diagonal AC plasma display panel.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.2 s.43
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• pp.41-47
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• 2007

Today lots of investigations on Embedded Passive Technology using materials and chip components have been carried out. We fabricated diplexers with 1005 sized-passives, which were made by burying chips in PCB substrate and surface mounting chip on PCB. 6 passive chips (inductors and capacitors) were used for the frequency divisions of $880\;MHz{\sim}960\;MHz(GSM)$ and $1.71\;GHz{\sim}1.88\;GHz(DCS)$. Two types of diplxer were characterized with Network analyzer. The chip buried diplexer showed extra 5db loss and a little deviation of 0.6GHz at aimed frequency areas, whereas the chip mounted diplexer showed man. 0.86dB loss within GSM field and max. 0.68dB within DCS field respectively. But few degradations were observed after $260^{\circ}C$ for 80min baking and $280^{\circ}C$ for 10sec solder floating.