• Title/Summary/Keyword: Electronic packaging technology

Search Result 297, Processing Time 0.024 seconds

Printing Morphology and Rheological Characteristics of Lead-Free Sn-3Ag-0.5Cu (SAC) Solder Pastes

  • Sharma, Ashutosh;Mallik, Sabuj;Ekere, Nduka N.;Jung, Jae-Pil
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.21 no.4
    • /
    • pp.83-89
    • /
    • 2014
  • Solder paste plays a crucial role as the widely used joining material in surface mount technology (SMT). The understanding of its behaviour and properties is essential to ensure the proper functioning of the electronic assemblies. The composition of the solder paste is known to be directly related to its rheological behaviour. This paper provides a brief overview of the solder paste behaviour of four different solder paste formulations, stencil printing processes, and techniques to characterize solder paste behaviour adequately. The solder pastes are based on the Sn-3.0Ag-0.5Cu alloy, are different in their particle size, metal content and flux system. The solder pastes are characterized in terms of solder particle size and shape as well as the rheological characterizations such as oscillatory sweep tests, viscosity, and creep recovery behaviour of pastes.

Effects of Nano-sized Diamond on Wettability and Interfacial Reaction for Immersion Sn Plating

  • Yu, A-Mi;Kang, Nam-Hyun;Lee, Kang;Lee, Jong-Hyun
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.17 no.3
    • /
    • pp.59-63
    • /
    • 2010
  • Immersion Sn plating was produced on Cu foil by distributing nano-sized diamonds (ND). The ND distributed on the coating surface broke the continuity of Sn-oxide layer, therefore leading to penetrate the molten solder through the oxide and retarding the wettability degradation during a reflow process. Furthermore, the ND in the Sn coating played a role of diffusion barrier for Sn atoms and decreased the growth rate of intermetallic compound ($Cu_6Sn_5$) layer during the solid-state aging. The study confirmed the importance of ND to improve the wettability and reliability of the Sn plating. Complete dispersion of the ND within the immersion Sn plating needs to be further developed for the electronic packaging applications.

Low Temperature bonding Technology for Electronic Packaging (150℃이하 저온에서의 미세 접합 기술)

  • Kim, Sun-Chul;Kim, Youngh-Ho
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.19 no.1
    • /
    • pp.17-24
    • /
    • 2012
  • Recently, flip chip interconnection has been increasingly used in microelectronic assemblies. The common Flip chip interconnection is formed by reflow of the solder bumps. Lead-Tin solders and Tin-based solders are most widely used for the solder bump materials. However, the flip chip interconnection using these solder materials cannot be applied to temperature-sensitive components since solder reflow is performed at relatively high temperature. Therefore the development of low temperature bonding technologies is required in these applications. A few bonding techniques at low temperature of $150^{\circ}C$ or below have been reported. They include the reflow soldering using low melting point solder bumps, the transient liquid phase bonding by inter-diffusion between two solders, and the bonding using low temperature curable adhesive. This paper reviews various low temperature bonding methods.

Recent Advances in Conductive Adhesives for Electronic Packaging Technology (전도성 접착제를 이용한 패키징 기술)

  • Kim, Jong-Woong;Lee, Young-Chul;Noh, Bo-In;Yoon, Jeong-Won;Jung, Seung-Boo
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.16 no.2
    • /
    • pp.1-9
    • /
    • 2009
  • Conductive adhesives have recently received a lot of focus and attention from the researchers in electronics industry as a potential substitute to lead-containing solders. Numerous studies have shown that the conductive adhesives have many advantages over conventional soldering such as environmental friendliness, finer pitch feasibility and lower temperature processing. This review focuses on the recent research trends on the reliability and property evaluation of anisotropic and non-conductive films that interconnect the integrated circuit component to the printed circuit board or other types of substrate. Major topics covered are the conduction mechanism in adhesive interconnects; mechanical reliability; thermo-mechanical-hygroscopic reliability and electrical performance of the adhesive joints. This review article is aimed at providing a better understanding of adhesive interconnects, their principles, performance and feasible applications.

  • PDF

Flip-Chip Package of Silicon Pressure Sensor Using Lead-Free Solder (무연솔더를 이용한 실리콘 압력센서의 플립칩 패키지)

  • Cho, Chan-Seob
    • Journal of the Korean Society of Industry Convergence
    • /
    • v.12 no.4
    • /
    • pp.215-219
    • /
    • 2009
  • A packaging technology based on flip-chip bonding and Pb-free solder for silicon pressure sensors on printed circuit board (PCB) is presented. First, the bump formation process was conducted by Pb-free solder. Ag-Sn-Cu solder and the pressed-screen printing method were used to fabricate solder bumps. The fabricated solder bumps had $189-223{\mu}m$ width, $120-160{\mu}m$ thickness, and 5.4-6.9 standard deviation. Also, shear tests was conducted to measure the bump shear strength by a Dage 2400 PC shear tester; the average shear strength was 74 g at 0.125 mm/s of test speed and $5{\mu}m$ shear height. Then, silicon pressure sensor packaging was implemented using the Pb-free solder and bump formation process. The characteristics of the pressure sensor were analogous to the results obtained when the pressure sensor dice are assembled and packaged using the standard wire-bonding technique.

  • PDF

Design of a Pin-Fin Structure in a Channel Considering the Heat Transfer and Pressure Drop Characteristics (열전달 및 압력강하 특성을 고려한 채널 내 핀-휜 구조물의 설계)

  • Shin, Jee-Young;Son, Young-Seok;Lee, Dae-Young
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
    • /
    • v.18 no.6
    • /
    • pp.459-467
    • /
    • 2006
  • Rapid development of electronic technology requires small size, high density packaging and high power in the electronic devices, which results in more heat generation. Suitable heat dissipation is required to ensure the guaranteed performance and reliable operation of the current state-of-the-art electronic equipment. The aim of the present study is to find out the forced-convective thermal-hydraulic characteristics of a pin-fin heat exchanger as a candidate for cooling system of the electronic devices through the analysis and experiment. Various configuration of the pin-fin array is selected in order to find out the effect of spacing and diameter of the pin-fin on the heat transfer and pressure drop characteristics. Experimental results are compared with the analyses and correlations of several researchers. Finally, the design guide are provided for the required pressure drop and/or the heat transfer characteristics of the heat exchanger.

Measurement and Explanation of DC/RF Power Loci of an Active Patch Antenna

  • Mcewan, Neil J.;Ali, Nazar T.;Mezher, Kahtan A.;El-Khazmi, Elmahdi A.;Abd-Alhameed, Raed A.
    • ETRI Journal
    • /
    • v.33 no.1
    • /
    • pp.6-12
    • /
    • 2011
  • A case study of an active transmitting patch antenna revealed a characteristic loop locus of DC power versus RF output power as drive frequency was varied, with an operational bandwidth substantially smaller than the impedance bandwidth of the radiator. An approximate simulation technique, based on separation of the output capacitance of the power transistor, yielded easily visualized plots of power dependence on internal load impedance, and a simple interpretation of the experimental results in terms of a near-resonance condition between the output capacitance and output packaging inductance.

Influence of Laminating and Sintering Condition on Permittivity and Shrinkage During LTCC Process (LTCC 공정 중 적층 및 소결이 유전율과 회로 형상에 미치는 영향)

  • Jeong, M.S.;Hwang, S.H.;Chung, H.W.;Rhim, S.H.;Oh, S.I.
    • Transactions of Materials Processing
    • /
    • v.16 no.5 s.95
    • /
    • pp.396-400
    • /
    • 2007
  • LTCC(Low Temperature Co-fired Ceramic) which offers a good performance to produce multilayer structures with electronic circuits and components has emerged as an attractive technology in the electronic packaging industry. In LTCC module fabrication process, the lamination and the sintering are very important processes and affect the electrical characteristics of the final products because the processes change the permittivity of ceramics and the dimension of the circuit patterns which have influences on electronic properties. This paper discusses the influence of lamination pressure and sintering temperature on the permittivity and the dimensional change of LTCC products. In the present investigation, it is shown that the permittivity increases along with increasing of the lamination pressure and the sintering temperature.

Real-time Monitoring of Cu Plating Process for Semiconductor Interconnect

  • Wang, Li;Jee, Young-Joo;Soh, Dae-Wha;Hong, Sang-Jeen
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2009.11a
    • /
    • pp.64-64
    • /
    • 2009
  • As the advanced packaging technology developing, Copper electro-plating processing has be wildly utilized in the semiconductor interconnect technique. Chemical solution monitoring methods, including PH and gravity measurement exist in industry, but economical and practical real-time monitoring has not been achieved yet. Red-green-blue (RGB) color sensor can successfully monitor the condition of $CuSO_4$ solution during electric copper plating process. Comparing the intensity variations of the RGB data and optical spectroscopy data, strong correlation between two in-situ sensors have shown.

  • PDF

An experimental study on the cooling characteristics of electronic cabinet (전자장비 캐비넷의 냉각특성에 관한 실험적 연구)

  • Park, Jong-Heung;Lee, Jae-Heon
    • Transactions of the Korean Society of Mechanical Engineers B
    • /
    • v.20 no.7
    • /
    • pp.2356-2366
    • /
    • 1996
  • High-power electronic chips have been advanced to such an extent that the heat dissipation capability of a system design has become one of the primary limiting factors. Therefore, thermal design must be considered in the early stage of the electronic system development. In present paper, the results of an experimental study on the forced convection cooling are presented to evaluate cooling performance of an electronic cabinet which in generally used for telecommunication system. Temperatures and thermal resistances are applied to compare the heat transfer characteristics for various locations of a fan unit as well as various configuration of non-uniform powering modules. As a result, the optimal configuration of a fan unit and powering configuration is suggested for the effective thermal design of telecommunication system.