• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.105-107
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• 2002

The device characteristics and the interface electronic structures of organic light-emitting devices based on tris-(8-hydroxyquinoline)aluminum were investigated with $Al/CaF_2$, Al/LiF, and Al-only cathodes. Similar to the Al/LiF cathode, the $Al/CaF_2$ cathode greatly improved the performance of the device over Al-only cathode. However, a photoelectron spectroscopy study revealed that despite the performance improvement, the evolution of the new peaks during $Al/CaF_2$ cathode formation closely resembled those of the Al-only cathode rather than the Al/LiF cathode.

• Journal of Electrical Engineering and Technology
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• v.6 no.3
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• pp.418-422
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• 2011

For low-power sensor networks, a compact design of advanced encryption standard (AES) algorithm is needed. A very small AES core for ZigBee devices that accelerates computation in AES algorithms is proposed in this paper. The proposed AES core requires only one S-Box, which plays a major role in the optimization. It consumes less power than other block-wide and folded architectures because it uses fewer logic gates. The results show that the proposed design significantly decreases power dissipation; however, the resulting increased clock cycles for 128-bit block data processing are reasonable for IEEE 802.15.4 standard throughputs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.137-140
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• 2001

To improve structural properties and induce higher conductivity, we have annealed emitting layer. The temperature condition was investigated by various experiment. To observe the surface morphology of emitting layer, measured the AFM and the X -ray diffraction pattern of P3HT film is shown. It is move to slightly low angles and diffraction peaks also become much sharper. After annealing of emitting layer, EL intensity and Voltage-current-luminance curve is better as compared with untreated. But PL intensity was decreased. It is known that by emission principal. After annealing of emitting layer, EL devices enhances the interface adhesion between the emissive polymer and Indium-tin-oxide electrode, which takes a critical role to improve the emitting properties of EL devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.243-246
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• 2001

In this paper, we have proposed a novel trench electrode Base Resistance Thyristor(BRT) and trench electrode BRT with a intrinsic region. A new power BRTs have shown superior electrical characteristics including snab-back effict and forward blocking voltage more than the conventional BRT. Especially, the trench electrode BRT with intrinsic region has obtained high blocking voltage of 1600V. The blocking voltage of conventional BRT is about 400V at the same size. Because the breakdown mechanism of BRT is avalanch breakdown by impact ionization, the trench electrode BRT with intrinsic region has suppressed impact ionization, effectively. If we use this principle, we can develope super high voltage power devices and applicate to another power devices including IGBT, EST and etc.

• Annual Conference of KIPS
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• 2003.11b
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• pp.1049-1052
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• 2003

A home network system was implemented using IPv6 and SIP. We integrated different kinds of home devices into IPv6 address system, and built control system independent of controller's address and location, using SIP. Also, controllers can download each device centrol messages without any global definition of handling it. We implemented this system by home device emulator, and PDA controller to control home devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.11a
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• pp.46-49
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• 1994

In this paper we investigate the characteristics of switching and memory traps in sealed MONOS nonvolatile memory devices with different nitride thicknesses. We have demonttrated flatband voltage shift of 1V with 5V programming voltage. By fitting the experimental observations with theoretical calculations, trap density and capture cross section of memory trap at the nitride-blocking oxide interface are estimated to be 1.0${\times}$10$\^$13/ cm$\^$-2/ and 8.0${\times}$10$\^$14/ cm$\^$-2/

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.11a
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• pp.59-64
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• 1994

The Si-SiO$_2$interface trpas of the degraded short-channel SONOSFET memory devices were investigated using the charge pumping techniques. The degradation of devices with write/erase cycle appeared as the increase of the Si-SiO$_2$interface trap density. In order to determine the capture cross-section of the interface trap. I$\_$CP/-V$\_$GL/ characteristic curves were measured at different temperatures. Also, the spatial distributions of Si-SiO$_2$interface trap were examined by the variable-reverse bias boltage method.

• Journal of the Korean Society for Precision Engineering
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• v.18 no.10
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• pp.178-183
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• 2001

Abrasive jet machining(AJM) process is similar to the sand blasting and effectively removes hard and brittle materials. AJM has applied to rough working such as debarring and rough finishing. As the need for machining of ceramics, semiconductor, electronic devices and LCD are increasing, micro AJM is developed, and has become the inevitable technique to micromachining. This paper describes the performance of the micro AJM in micro grooving of glass. Diameter of hole and width of line in grooving is 80${\mu}{\textrm}{m}$. Experimental results showed good performance in micro grooving of glass, but the size of machined groove increased about 2~4${\mu}{\textrm}{m}$. With the fine tuning of masking process and compensation of film wear. this micro AJM could be effectively applied to the micro machining of semiconductor, electronic devices and LCD.

• Proceedings of the Korean Vacuum Society Conference
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• 2008.02a
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• pp.307-307
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• 2008

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.35 no.3
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• pp.268-274
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• 2007

In general, rocket or satellite circuit designers focus on reducing temperature of electronic devices in order to enhance electronic unit's reliability. This paper describes the quantitative analysis result of activation energy as well as device temperature effects to the system reliabilities. The quantitative analysis result shows that activation energy of device has more effects on system reliability than temperature does. And this paper suggests a strategy for enhancement of reliability during devices placement on PCB with simulation results.