• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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• pp.239-242
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• 1998

Ca $F_2$ films have superior gate insulator properties than conventional gate insulator such as $SiO_2$, Si $N_{x}$, $SiO_{x}$, and T $a_2$ $O_{5}$ to the side of lattice mismatch between Si substrate and interface trap charge density( $D_{it}$). Therefore, this material is enable to apply Thin Film Transistor(TFT) gate insulator. Most of gate oxide film have exhibited problems on high trap charge density, interface state in corporation with O-H bond created by mobile hydrogen and oxygen atom. This paper performed Ca $F_2$ property evaluation as MIM, MIS device fabrication. Ca $F_2$ films were deposited at the various substrate temperature using a thermal evaporation. Ca $F_2$ films was grown as polycrystalline film and showed grain size variation as a function of substrate temperature and RTA post-annealing treatment. C-V, I-V results exhibit almost low $D_{it}$(1.8$\times$10$^{11}$ $cm^{-1}$ /le $V^{-1}$ ) and higher $E_{br}$ (>0.87MV/cm) than reported that formerly. Structural analysis indicate that low $D_{it}$ and high $E_{br}$ were caused by low lattice mismatch(6%) and crystal growth direction. Ca $F_2$ as a gate insulator of TFT are presented in this paper paperaper

• 센서학회지
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• 제5권1호
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• pp.37-42
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• 1996

기존의 진공증착 방법으로 $SiO_{2}$ 막이 성장된 Si웨이퍼 위에 ZnO막을 제조하였다. Anhydrous zinc acetate를 자체 제작한 황동보트안에 넣고 가열하여 승화시켰다. 기판온도는 $200^{\circ}C$에서 $600^{\circ}C$까지 변화시켰으며 공정중에 산소를 주입하여 챔버내 산소 분압을 증가시켰다. 증가된 산소분압에 의해 고저항의 ZnO막을 얻을 수 있었다. 제조된 막의 결정성 및 성분을 알기 위해 XRD, EDS 및 RBS 측정을 하였다. 고저항의 ZnO막은 70%이상의 상대습도에 매우 민감한 저항감소를 나타내었다.

• Macromolecular Research
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• 제11권2호
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• pp.80-86
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• 2003

The polymerization of a cyclopolymerizable disubstituted dipropargyl ether, his(3-trimethylsilyl-2-propynyl)ether (BTPE), was attempted by various transition metal catalysts. The yield for the polymerization of BTPE was generally low, which is possibly due to the steric hindrance of bulky substituents. In general, the catalytic activities of Mo-based catalysts were found to be greater than those of W-based catalysts. The highest yield was obtained when the MoCl$_{5}$,-EtAlCl$_2$(1:2) catalyst system was used. The copolymerization of BTPE and diethyl dipropargylmalonate yielded a random copolymer with conjugated polymer backbone. However the polymers were partially desilylated, depending on the reaction conditions. The thermal and morphological properties of the resulting polymers were also discussed.d.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.275-276
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• 2009

We have studied physical properties of organic light-emitting diodes (OLEDs) in a device with 7,7,8,8-tetracyanoquinodimethane (TCNQ). Since the TCNQ has a high electron affinity, it is widely used for a charge-transport and injection layer. And the TCNQ-derivatives have also been used to control the conductivity of the materials. It is known that a charge injection and transport in OLEDs with a TCNQ-derivative enhances a performance of the devices such as operating voltage and efficiency. To see how the TCNQ affects on the device performance, we have made a reference device in a structure of ITO(170nm)/TPD(40nm)/$Alq_3$(60nm)/LiF(0.5nm)/Al(100nm). And several type of devices were manufactured by doping TCNQ either in TPD or $Alq_3$ layer. The TCNQ layer was also formed in between the organic layers. N,N'-diphenyl-N,N'-di(m-tolyl)-benzidine (TPD), tri(8-hydroxy quinoline) aluminium ($Alq_3$), and TCNQ layers were formed by thermal evaporation at a pressure of $10^{-6}$ torr. The deposition rate was $1.0{\sim}1.5\;{\AA}/s$ for TPD, and $1.0{\sim}1.5\;{\AA}$ for $Alq_3$. The LiF was thermally evaporated at a deposition rate of $0.2\;{\AA}/s$ successively. The device with TCNQ-derivative improved the turn-on voltage compared to the one without TCNQ-derivative.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.325-325
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• 2008

스크린 프린팅에 의한 압전 후막은 MEMS 공정을 이용하여 마이크로 펌프, 마이크로 벨브, 마이크로 센서, 마이크로 로봇 등 여러 초소형 기계부품에 응용되고 있으며, Sol-Gel, PLD를 이용해 증착된 막 등에 비해 수십${\mu}m$의 비교적 두꺼운 막을 형성시킬 수 있는 장점을 가지고 있다. 그러나 실리콘 기판을 사용하여 스크린 프린팅으로 형성된 압전 후막의 경우, 공정상 바인더를 연소시키는 과정을 거치게 되므로, 밀집된(Dense) 구조를 가지는 막을 만들기가 어렵다. 이로 인해 스크린 프린팅에 의한 후막은 전기적 특성 및 기계적 특성이 떨어지는 경향이 있다. 본 연구에서는 스크린 프린팅에 의한 압전 후막의 밀집된 구조 및 특성을 향상시키기 위해 0.01Pb$(Mg_{1/2}W_{1/2})$O3-0.41Pb$(Ni_{1/3}Nb_{2/3})O_3-0.35PbTiO_3-0.23PbZrO_3$의 powder와 Attrition 밀링 처리된 powder를 비율별로 혼합하여 입자의 크기를 변화시켜 막의 충진 밀도를 향상시켰으며, 열처리 효과를 극대화시키기 위해 RTA(Rapidly Thermal Annealing)를 통해 열처리 하였다. Attrition 밀링에 의한 파우더를 각각 비율별로 100%, 50%, 25%로 혼합하여 만든 압전 세라믹 페이스트는 P-type(100)Si Wafer sample 위에 $1{\mu}m$의 하부전극용($1100^{\circ}C$) Ag 전극을 screen print하여 소결했다. 그리고 다시 전극이 형성된 Si wafer 위에 스크린 프린팅하고, 건조 한 후 RTA로 300초 동안 열처리 한 결과 밀집된 구조를 가지는 압전 후막을 제작 수 있었다.

• E2M - 전기 전자와 첨단 소재
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• 제8권5호
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• pp.619-625
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• 1995

Polycrystalline CdTe thin film has been studied for photovoltaic application due to the 1.45 eV band gap energy ideal for solar energy conversion and high absorption coefficient. The formation of low resistance contact to p-CdTe is difficult because of large work function(>5.5eV). Common methods for ohmic contact to p-CdTe are to form a p+ region under the contact by in-diffusion of contact material to reduce the barrier height and modify a p-CdTe surface layer using chemical treatment. In this study, the surface chemical treatment of p CdTe was carried out by H$\_$3/PO$\_$4/+HNO$\_$3/ or K$\_$2/Cr$\_$2/O$\_$7/+H$\_$2/SO$\_$4/ solution to provide a Te-rich surface. And various thin film contact materials such as Cu, Au, and Cu/Au were deposited by E-beam evaporation to form ohmic contact to p-CdTe. After the metallization, post annealing was performed by oven heat treatment at 150.deg. C or by RTA(Rapid Thermal Annealing) at 250-350.deg. C. Surface chemical treatments of p-CdTe thin film improved metal/p-CdTe interface properties and post heat treatment resulted in low contact resistivity to p-CdTe.Of the various contact metal, Cu/Au and Cu show low contact resistance after oven and RTA post-heat treatments, respectively.

• 한국전기전자재료학회논문지
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• 제15권4호
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• pp.319-324
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• 2002

In this study, the reduce of plasma etching damage in PZT thin film with addictive gas and re-annealing after etching have been investigated. The PZT thin films were etched as a function of $Cl_2/CF_4$ with addition of Ar and $O_2$ with inductively coupled plasma. The etch rates of PZT thin films were 1450 ${\AA}/min$ at 30% additive Ar and 1100 ${\AA}/min$ at 10% auditive $O_2$ into $Cl_2/CF_4$ gas mixing ratio of 8/2. In order to reduce plasma damage of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures at $O_2$ atmosphere. From the hysteresis curries, the ferroelectric properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed PZT films is consistent wish the increase of the (100) and (200) PZT peaks revealed by x-ray diffraction (XRD). From x ray photoelectron spectroscopy (XPS) analysis, the intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of $Ti_xO_y$ is recovered by $O_2$ recombination during rapid thermal annealing process.

• 한국전기전자재료학회논문지
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• 제20권7호
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• pp.575-580
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• 2007

A 16 Mb 1T1C FeRAM device was integrated with BLT capacitors. But a lot of cells were failed randomly during the measuring the bit-line signal distribution of each cell. The reason was revealed that the grain size and orientation of the BLT thin film were severely non-uniform. And the grain size and orientation were severely affected by the process conditions of post heat treatment, especially nucleation step. The optimized annealing temperature at the nucleation step was $560^{\circ}C$. The microstructure of the BLT thin film was also varied by the annealing time at the step. The longer process time showed the finer grain size. Therefore, the uniformity of the grain size and orientation could be improved by changing the process conditions of the nucleation step. The FeRAM device without random bit-fail cell was successfully fabricated with the optimized BLT capacitor and the sensing margin in bit-line signal distribution of it was about 340 mV.

• Transactions on Electrical and Electronic Materials
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• 제13권1호
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• pp.39-42
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• 2012

To study the physical and chemical properties, solid solutions of $(Sr_{1-x}Ba_x)NdFe{^{3+}}_{1-\tau}Fe{^{4+}}_{\tau}O_{4-y}$ system with x=0.0(SBN-0), 0.1(SBN-1), 0.2(SBN-2) and 0.3(SBN-3) were synthesized in air at 1,473 K and annealed in air at 1,073 K for 24 h. X-ray powder diffraction assured that the four samples had tetragonal symmetries (I4/mmm). Their lattice volumes increased gradually with x values. Nonstoichiometric chemical formulas were formulated using the data such as $\tau$(amount of $Fe^{4+}$ ion) and y(oxygen deficiency) values using Mohr salt analysis. It was found out that all the four samples had excessive oxygen (4-y>4.0). All the samples started to lose some of their oxygen at around 613K(TG/DTA thermal analysis). They exhibited semiconductivities in the temperature range of around 283-1173K. All the four specimens had sufficient tensile strength to endure the force of 19.6 N (2 kg of weights) and the conductivity values of the ECIAs which were painted on pieces of glass with the area of $150mm^2$ ($10mm{\times}15mm$) and it was in the order of ECIA-0${\rightarrow}$ECIA-1${\rightarrow}$ECIA-2${\rightarrow}$ECIA-3 at a constant temperature.

• 마이크로전자및패키징학회지
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• 제20권3호
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• pp.37-44
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• 2013

유연 솔더가 실장된 패키지와 무연 솔더가 실장된 패키지의 온도에 따른 변형 거동은 솔더 자체의 물성치 뿐만 아니라 패키지를 구성하는 재료의 물성치에도 큰 영향을 받는다고 알려져 있다. 본 논문에서는 스트레인 게이지의 온도특성을 이용하여 미지 재료의 열팽창계수를 결정하는 방법을 정립하고, 반도체 패키지 몰딩 화합물의 열팽창계수를 실험적으로 구하였다. 탄소강과 알루미늄 시편을 기준 시편으로 사용하고 스트레인 게이지 측정을 통하여 온도에 따른 유연 솔더용 몰딩 화합물과 무연 솔더용 몰딩 화합물의 열팽창계수를 구하고, 무아레 간섭계를 이용하여 비접촉적으로 열팽창 계수를 측정하여 결과를 비교하였다. 기준 시편에 따른 두 가지 스트레인 게이지 실험 결과와 무아레 실험 결과가 잘 일치하여서 실험방법에 신뢰성이 있는 것을 보였다. 유연 솔더용 몰딩 화합물의 경우에는 열팽창계수가 온도에 관계없이 약 $15.8ppm/^{\circ}C$로 측정되었고, 무연 솔더용의 경우에는 $100^{\circ}C$이하의 온도에서 몰딩 화합물의 열팽창계수는 약 $9.9ppm/^{\circ}C$이었으나 $100^{\circ}C$이상에서는 온도가 증가함에 따라 열팽창계수가 급격하게 증가되어 $130^{\circ}C$에서는 $15.0ppm/^{\circ}C$의 값을 가졌다.