• Title/Summary/Keyword: Electronic Hardware

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An area-efficient 256-point FFT design for WiMAX systems

  • Yu, Jian;Cho, Kyung-Ju
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.3
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    • pp.270-276
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    • 2018
  • This paper presents a low area 256-point pipelined FFT architecture, especially for IEEE 802.16a WiMAX systems. Radix-24 algorithm and single-path delay feedback (SDF) architecture are adopted in the design to reduce the complexity of twiddle factor multiplication. A new cascade canonical signed digit (CSD) complex multipliers are proposed for twiddle factor multiplication, which has lower area and less power consumption than conventional complex multipliers composed of 4 multipliers and 2 adders. Also, the proposed cascade CSD multipliers can remove look-up table for storing coefficient of twiddle factors. In hardware implementation with Cyclone 10LP FPGA, it is shown that the proposed FFT design method achieves about 62% reduction in gate count and 64% memory reduction compared with the previous schemes.

The Algorithm for Deinterleaving of Multi-Step Stagger PRI Signals of Pulse Radars (펄스 레이더의 다단 Stagger PRI 신호분리 알고리즘)

  • Lim, Joong-Soo
    • Journal of Satellite, Information and Communications
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    • v.8 no.4
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    • pp.159-163
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    • 2013
  • In this paper, we propose a new method to deinterleave multi-stage stagger PRI signals of pulse radars using the electronic intelligence systems. While former algorithms were based on hardware PRI tracker only using the first deviation of the TOA of radar signals, this paper uses the first and the second deviation of TOA of radar signals and uses the PRI histogram method to deinterleave multiple PRIs of pulse radars. This algorithm can be used for deinterleaving various PRI signals at electronic intelligence systems.

A Study on the Digital Hardware Implementation of Self-Organizing feature Map Neural Network with Constant Adaptation Gain and Binary Reinforcement Function (일정 학습계수와 이진 강화함수를 가진 SOFM 신경회로망의 디지털 하드웨어 구현에 관한 연구)

  • 조성원;석진욱;홍성룡
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1997.10a
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    • pp.402-408
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    • 1997
  • 일정 학습계수와 이진 강화함수를 지닌 자기조직화 형상지도(Self-Organizing Feature Map)신경회로망을 FPGA위에 하드웨어로 구현하였다. 원래의 SOFM 알고리즘에서 학습계수가 시간 종속형인데 반하여, 본 논문에서 하드웨어로 구현한 알고리즘에서는 학습계수가 일정인 값으로 고정되며 이로 인한 성능저하를 보상하기 위하여 이진 강화함수를 부가하였다. 제안한 알고리즘은 복잡한 곱셈 연산을 필요로 하지 않으므로 하드웨어 구현시 보다 쉽게 구현 가능한 특징이 있다. 1개의 덧셈/뺄셈기와 2개의 덧셈기로 구성된 단위 뉴런은 형대가 단순하면서 반복적이므로 하나의 FPGA위에서도 다수의 뉴런을 구현 할 수 있으며 비교적 소수의 제어 신호로서 이들을 모두 제어 가능할 수 있도록 설계하였다. 실험결과 각 구성부분은 모두 이상 없이 올바로 동작하였으며 각 부분이 모두 종합된 전체 시스템도 이상 없이 동작함을 알 수 있었다.

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Measurement error reduction technique for the Semiconductor Device DC Characteristic Measurement System (반도체 소자의 직류특성 측정 시스템에서의 저전류 측정 오차 감소 기법)

  • Choi, In-Kyu;Jung, Hae-Yone;Park, Jong-Sik
    • Proceedings of the KIEE Conference
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    • 2001.11c
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    • pp.352-355
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    • 2001
  • In this paper, we proposed measurement error reduction technique for the semiconductor device DC characteristic measurement system. Implemented system is composed of 4 SMUs, 2 VSUs, and 2 VMUs. Various efforts in hardware and software have been made to reduce the measurement errors due to the leakage current in measurement circuits. Internal and external sources of errors in measurement system especially in pA range measurement have been identified and removed. Experimental results show that the implemented system can be measure the DC characteristic of semiconductor devices in pA level.

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Development of General High Performance Digital Controller Using TMS320C30 for Power Electronic Applications (전력전자 응용을 위한 TMS320C30 범용제어기의 개발)

  • Kim, Joohn-Sheok;Sul, Seung-Ki;Park, Min-Ho
    • Proceedings of the KIEE Conference
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    • 1992.07a
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    • pp.508-511
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    • 1992
  • Modern control theory has been developed day by day, but it hardly has been applicated practically to the various fields of industry, specially power electronic field, because there is no cost effective hardware that accommodates modern control theory. Thus, in our study, DSP based ultra high speed general controller which may be exclusively used for power electronic applications is developed.

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Power Consumption Analysis and Minimization of Electronic Shelf Label System (전자가격표시시스템의 소모전력 분석 및 최소화 방안)

  • Woo, Rinara;Kim, Jungjoon;Seo, Dae-Wha
    • IEMEK Journal of Embedded Systems and Applications
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    • v.9 no.2
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    • pp.75-80
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    • 2014
  • Energy consumption of sensor nodes is minimized because it has limited energy generator in wireless sensor network. Electronic shelf label system is one of application fields using wireless sensor networks. Battery size of small apparatus for displaying price is restricted. Therefore its current consumption have to be minimized. Furthermore the method for minimization of peak current would be considered because life cycle of coin battery used to display or RF is vulnerable to intensity of drain current. In this paper, we analyze current consumption pattern of low-power electronic shelf label system. Then we propose the method for minimization of current consumption by modification of software and hardware. Current consumption of the system using proposed method are approximately 15 to 20 percent lower than existing system and the life cycle of the system is approximately 10 percent higher than existing system.

Object-Based Fault Diagnosis Expert System (객체 기반 고장 진단 전문가 시스템)

  • Kwon, Kyung-Bong;Kim, Jung-Nyun;Baek, Young-Sik
    • Proceedings of the KIEE Conference
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    • 1997.11a
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    • pp.190-192
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    • 1997
  • In this paper we developed an object-based expert system for electric power system fault diagnosis. The object corresponds to a hardware or event in real world and they are independent each other. The expert system is designed to estimate the fault sections and identify the false operation, nonoperation of protective devices. The expert system was developed using C++ language in pentium PC. We applied the expert system in various sample systems and showed that making up a knowledge base is easier and diagnosis was done in a approximately real time.

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Design of High Speed Modular Multiplication Using Hybrid Adder (Hybrid 가산기를 이용한 고속 모듈러 곱셈기의 설계)

  • Lee, Jae-Chul;Lim, Kwon-Mook;Kang, Min-Sup
    • Proceedings of the Korea Information Processing Society Conference
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    • 2000.10a
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    • pp.849-852
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    • 2000
  • 본 논문에서는 RSA 암호 시스템의 Montgomery 모듈러 곱셈 알고리듬을 개선한 고속 모듈러 곱셈 알고리듬을 제안하고, Hybrid 구조의 가산기를 사용한 고속 모듈러 곱셈 알고리듬의 설계에 관하여 기술한다. 기존 Montgomery 알고리듬에서는 부분합계산시 2번의 덧셈연산이 요구되지만 제안된 방법에서는 단지 1번의 덧셈 연산으로 부분 합을 계산할 수 있다. 또한 덧셈 연산 속도를 향상시키기 위하여 Hybrid 구조의 가산기를 제안한다. Hybrid 가산기는 기존의 CLA(Carry Look-ahad Adder)와 CSA(Carry Select Adder)알고리듬을 혼합한 구조를 기본으로 하고 있다. 제안된 고속 모듈러 곰셈기는 VHDL(VHSIC Hardware Description Language)을 이용하여 모델링하였고, $Synopsys^{TM}$사의 Design Analyzer를 이용하여 논리합성(Altera 10K lib. 이용)을 수행하였다. 성능 분석을 위하여 Altera MAX+ PLUS II 상에서 타이밍 시뮬레이션을 수행하였고, 실험을 통하여 제안한 방법의 효율성을 입증하였다.

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A FRAMEWORK FOR QUERY PROCESSING OVER HETEROGENEOUS LARGE SCALE SENSOR NETWORKS

  • Lee, Chung-Ho;Kim, Min-Soo;Lee, Yong-Joon
    • Proceedings of the KSRS Conference
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    • 2007.10a
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    • pp.101-104
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    • 2007
  • Efficient Query processing and optimization are critical for reducing network traffic and decreasing latency of query when accessing and manipulating sensor data of large-scale sensor networks. Currently it has been studied in sensor database projects. These works have mainly focused on in-network query processing for sensor networks and assumes homogeneous sensor networks, where each sensor network has same hardware and software configuration. In this paper, we present a framework for efficient query processing over heterogeneous sensor networks. Our proposed framework introduces query processing paradigm considering two heterogeneous characteristics of sensor networks: (1) data dissemination approach such as push, pull, and hybrid; (2) query processing capability of sensor networks if they may support in-network aggregation, spatial, periodic and conditional operators. Additionally, we propose multi-query optimization strategies supporting cross-translation between data acquisition query and data stream query to minimize total cost of multiple queries. It has been implemented in WSN middleware, COSMOS, developed by ETRI.

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Improving Strategies for Public Office Management System through the Electronic Document Implementation (전자문서 활용을 통한 공공부문 사무관리체계 혁신 방안)

  • 양정은
    • Journal of the Korea Society of Computer and Information
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    • v.4 no.4
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    • pp.236-243
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    • 1999
  • Information technologies have been wide spread in the public sector, especially government administrative of office. Most of the Korean internal government, IT influence focused on the hardware and input system, not so fast realized, and don't have fundamental development less of business dimension. And now, the electronic document implementation efficiently satisfies the government's process and management through the reduction of manned working steps. This study suggested the elimination of old ragged custom based on paper document. inner basis environment composing for the using of electronic document and the introduce of digitized network tele-working system etc, for the highly execution of future digital management system.

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