• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.8 s.99
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• pp.777-782
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• 2005

In this paper, adaptive bias circuit and PBG structure have been employed to suppress IMD(Inter-Modulation Distortion) and improve PAE(Power Added Efficiency) of the Doherty amplifier. Gate bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed power amplifier using adaptive bias circuit and PBG has been improved the $IMD_3$ by 7.5 dBc, and the average PAR by $12\%$, respectively.

• Journal of Electrical Engineering and Technology
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• v.10 no.1
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• pp.176-187
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• 2015

DC bias will cause abnormal vibration of transformers. Aiming at such a problem, transformer vibration affected by DC bias has been studied combined with transformer core and winding vibration mechanism use multi-physical field simulation software COMSOL in this paper. Furthermore the coupling model of electromagnetic-structural force field has been established, and the variation pattern of inner flux density, distribution of mechanical stress, tension and displacement were analyzed based on the coupling model. Finally, an experiment platform has been built up which was employed to verify the correctness of model.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.97-100
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• 2005

This paper proposes a linearization method that is to control the operating point of a class AB amplifier according to its output power. The proposed linearization method is presented in this paper and the performance test results using two-tone signal are presented also.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.9
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• pp.882-888
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• 2002

This paper proposed a bias stability circuit that compensates the degradation of MMIC's performance for the variation of the process and temperature. The proposed bias circuit proved the superior effect compared with the conventional bias circuit using the constant current source. It designed and fabricated simultaneously two amplifier on one layout for comparison in same conditions. One is amplifier with conventional bias circuit using constant current source and the other is amplifier with proposed bias stability circuit. The chip was measured the microwave performances under process variation that classed the level NOM, MIN and MAX. The amplifier with a conventional bias circuit using constant current source has 6.4 dB gain variation and 7 mA Ids variation at 1.8 GHz, but the amplifier with the proposed bias circuit has the 2.1 dB gain variation and 3 mA Ids variation. As the result, MMIC having the proposed bias circuit shows the superior compensation of the quiescent point than the MMIC having the conventional bias circuit under the variations of the process and temperature and can improve the yield of the MMIC. The fabricated chip size is 1.2 mm $\times$ 1.4 mm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.9
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• pp.924-931
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• 2002

In this paper, a new λ/4 bias transmission line that is added dumbbell-shaped defected ground structure(DGS) on ground plane of the conventional λ/4 bias transmission line is proposed. This DGS λ/4 bias transmission line maintains high characteristic impedance, but physical width is wider and length is shorter than that of the conventional bias line. If the proposed bias line is attached on signal transmission line, this bias line can reduces the $3^{rd}$ harmonic signal as well as the$2^{nd}$ harmonic signal. With harmonic reduction characteristics, efficiency and linearity of amplifier are improved. The proposed bias line is adopted in power amplifier on IMT-2000 base-station transmitting band. This paper presents several simulations and experimental results of DGS to show validity of the proposed power amplifier using the new λ/4 bias transmission line. Experimental results represent that the $3^{rd}$ harmonic signal is reduced about 26.5 dB and efficiency is improved about 9.1 % and IMD3 is improved 4.5 dB than the conventional structure.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.8 s.111
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• pp.707-712
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• 2006

In this paper, dual bias control circuit and PBG(Photonic BandGap) structure have been employed to improve PAE(Power Added Effciency) of the Doherty amplifier on Input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed Doherty amplifier using dual bias controlled circuit and PBG has been improved the average PAE by 8%, $IMD_3$ by -5 dBc. And proposed Doherty amplifier has a high efficiency more than 30% on overall input power level, respectively.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2001.11a
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• pp.239-242
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• 2001

본 논문에서는 self-bias 구조를 갖는 소 신호 증폭기에 대해 논의된다 주파수 영역은 ISM band (Industria1/Scientific/Medical band) 인 무선 랜 (WLL : Wireless Local Loop) 대역 5.8GHz 에서 설계하였다. 제시된 self-bias 구조는 단일 전원만을 사용한다는 장점을 가지고 있으며 입력 단에서 RFC (λ/4 전송선로)를 제거하고 매칭 회로에서 단락 스터브를 사용함으로 구조를 간단히 하였다. 이러한 bias조건에서 FET의 이득은 11dB이고 회로 설계 후 측정 결과는 입력 반사 손실 -16.455dB, 이득은 8.095dB이다. 이 소 신호 증폭기는 간단한 구조로 구현된 장점 뿐 만 아니라 무선 랜 분야에서도 충분히 응용 될 수 있으리라 기대된다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.4
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• pp.384-393
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• 2013

In this paper, a design of planar microwave bias-tee using lumped elements was presented. The bias-tee is composed of 2 blocks; DC block and RF choke. For this design of the bias-tee, a wideband capacitor was used for DC block. For a RF choke, a series connection of inductors which have different SRFs is used for a RF choke. In the RF choke, a series connection of resistor and capacitor was added in shunt to eliminate a loss from a series resonance. The designed bias-tee was implemented by using 1608 SMT chip components. The fabricated bias-tee was measured using Anritsu 3680K fixture which enables to remove an effect of a connector. The fabricated bias-tee presented -15 dB of return loss and -1.5 dB insertion loss at 10 MHz~18 GHz.

• Journal of electromagnetic engineering and science
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• v.13 no.2
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• pp.137-139
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• 2013

A compact metamaterial (MTM)-based tunable phase shifter consisting of four unit cells with a simple DC bias circuit has been designed at 2.4 GHz. The variable series capacitors and shunt inductors that are required to be loaded periodically onto a host transmission line are realized employing only chip variable capacitors (varactors). In addition, the proposed phase shifter requires only one DC bias source to control the varactors, with the matching condition of the MTM line automatically satisfied. The measured phase shifting range is $285.2^{\circ}$ (from $-74.2^{\circ}$ to $211^{\circ}$). The measured insertion loss is approximately 1.5 dB. The circuit/electromagnetic-simulated and measured results are in good agreement.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.78-84
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• 2009

This paper represents the effects of drain bias on the linearity and efficiency of an analog pre-distortion power amplifier(PA) for wideband code division multiple access(WCDMA) repeater applications. For verification, an analog predistorter(APD) with three-branch nonlinear paths for memory-effect compensation is implemented and a class-AB PA is fabricated using a 30-W Si LOMaS. From the measured results, at an average output power of 33 dBm(lO-dB back-off power), the PA with APD shows the adjacent channel leakage ratio(ACLR, ${\pm}$5 MHz offset) of below -45.1 dBc, with a drain efficiency of 24 % at the drain bias voltage($V_{DD}$) of 18 V. This compared an ACLR of -36.7 dEc and drain efficiency of 14.1 % at the $V_{DD}$ of 28 V for a PA without APD.