• Journal of Power Electronics
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• 제16권4호
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• pp.1316-1323
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• 2016

Multilevel inverters (MLIs) have been preferred over conventional two-level inverters due to their inherent properties such as reduced harmonic distortion, lower electromagnetic interference, minimal common mode voltage, ability to synthesize medium/high voltage from low voltage sources, etc. On the other hand, they suffer from an increased number of switching devices, complex gate pulse generation, etc. This paper develops an ingenious symmetrical MLI topology, which consumes lesser component count. The proposed level dependent sources concoction multilevel inverter (LDSCMLI) is basically a multilevel dc link MLI (MLDCMLI), which first synthesizes a stepped dc link voltage using a sources concoction module and then realizes the ac waveform through a conventional H-bridge. Seven level and eleven level versions of the proposed topology are simulated in MATLAB r2010b and prototypes are constructed to validate the performance. The proposed topology requires lesser components compared to recent component reduced MLI topologies and the classical topologies. In addition, it requires fewer carrier signals and gate driver circuits.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제51권7호
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• pp.351-356
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• 2002

The oil circulation rate (OCR) of the rotary compressor is a crucial factor affecting the performance and reliability of air-conditioning systems. In this paper, topology optimization of the single-phase induction motor of rotary compressor is carried out for reducing the OCR. The nonlinear transient characteristic of single-phase induction motor for rotary compressor is analyzed by using FLUX2D. The topology optimization for electromagnetic systems is developed using the finite element method (FEM). The topology optimization is applied to a single-phase induction motor for reducing the OCR. For validation, optimize induction motors are manufactured and tested.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제52권6호
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• pp.247-253
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• 2003

A novel finite element mesh regeneration method is presented for 3D shape optimization of electromagnetic devices. The method has its theoretical basis in the structural deformation of an elastic body. When the shape of the electromagnetic devices changes during the optimization process, a proper 3D finite element mesh can be easily obtained using the method from the initial mesh. For real engineering problems, the method guarantees a smooth shape with proper mesh quality, and maintains the same mesh topology as the initial mesh. Application of the optimum design of an electromagnetic shielding plate shows the effectiveness of the presented method.

• 한국정보통신학회논문지
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• 제15권11호
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• pp.2301-2306
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• 2011

현재 범용성이 높은 전자계 시뮬레이터가 널리 보급되어 왔으며, 안테나 설계, EMC 설계, 측정, 초고주파 소자 설계 등에 활용되고 있다. 본 연구에서는 X 밴드 영역에서 다양한 전자계 문제 해석을 목적으로 멀티 코어 기반 PC 자원을 보다 효율적으로 활용하고, 나아가 TCP/IP 기반 네트워크 토폴로지 구성을 통한 효율성 높은 전자계 시뮬레이터 구현을 위한 프레임워크 구축과 구현 방안을 제안하고 그 유효성을 검증하였다.

• Journal of Power Electronics
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• 제16권5호
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• pp.1689-1697
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• 2016

Continuous conduction mode (CCM) boost converters are commonly used in home appliances and various industries because of their simple topology and low input current ripples. However, these converters suffer from several disadvantages, such as hard switching of the active switch and reverse recovery problems of the output diode. These disadvantages increase voltage stresses across the switch and output diode and thus contribute to switching losses and electromagnetic interference. A new topology is presented in this work to improve the switching characteristics of CCM boost converters. Zero-current turn-on and zero-voltage turn-off are achieved for the active switches. The reverse-recovery current is reduced by soft turning-off the output diode. In addition, an input current sensorless control is applied to the proposed topology by pre-calculating the duty cycles of the active switches. Power factor correction is thus achieved with less effort than that required in the traditional method. Simulation and experimental results verify the soft-switching characteristics of the proposed topology and the effectiveness of the proposed input current sensorless control.

• ETRI Journal
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• 제41권5호
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• pp.648-657
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• 2019

A cluster topology was proposed with the assumption of zero noise to improve the performance of wireless body area networks (WBANs). However, in WBANs, the transmission power should be reduced as low as possible to avoid the effect of electromagnetic waves on the human body and to extend the lifetime of a battery. Therefore, in this work, we consider a bit error rate for a cluster-based WBAN and analyze the performance of the system while the transmission of sensors and cluster headers (CHs) is controlled. Moreover, a hierarchical topology is proposed for the cluster-based WBAN to further improve the throughput of the system; this proposed system is called as the hierarchical cluster WBAN. The hierarchical cluster WBAN is combined with a transmission control scheme, that is, complete control, spatial reuse superframe, to increase the throughput. The proposed system is analyzed and evaluated based on several factors of the system model, such as signal-to-noise ratio, number of clusters, and number of sensors. The calculation result indicates that the proposed hierarchical cluster WBAN outperforms the cluster-based WBAN in all analyzed scenarios.

• 전기학회논문지
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• 제56권9호
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• pp.1643-1647
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• 2007

Recently, there is a need for research concerning the technologies and precaution methods against electronic bomb assaults. There lays perplex constitution and much coupling phenomenon in this type of system, and thus requires much time and memory in order to translate the system with the existing translation methods. Applying the EMT (Electromagnetic Topology) would prove much more efficient. In this paper, EMT has been applied to the circuit-like micro system, previously employed in micro systems. Also, each section has been interpreted using the BLT (Baum, Liu, Tesche) equation using the EMT, then reconstructed, consequentially interpreting an entire system. In this paper, a simple circuit containing active and passive elements based on a CPW has been interpreted employing the BLT equation, and has been proven by experiment using the circuit simulation, a simulation officially recognized for its accuracy in interpreting small structures. The interpretation results have been presented by an S-parameter, and by comparing the interpretation results attained through the BLT equation and that from common simulation to that from experimentation, that the BLT equation turned out to be the most reliable interpretation method could be found.

• Journal of electromagnetic engineering and science
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• 제7권4호
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• pp.147-153
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• 2007

This paper represents an analog predistortion linearizer for the high power amplifier with low memory effect. The high power amplifier is implemented using a 90-W peak envelope power(PEP) LDMOSFET at 2.14-GHz and an envelope short matching topology is applied at the active ports to minimize the memory effect. The analog predistortion circuit comprises the fundamental path and the cuber and quintic generating circuits, whose amplitudes and phases can be controlled independently. The predistortion circuit is tested for two-tone and wide-band code division multiple access(WCDMA) 4FA signals. For the WCDMA signal, the adjacent channel leakage ratios(ACLRs) at 5 MHz offset are improved by 12.4 dB at average output powers of 36 dBm and 42 dBm.

• Journal of electromagnetic engineering and science
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• 제6권1호
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• pp.62-70
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• 2006

This paper presents a new power plane design method incorporating a single geometry derived from a unit cell of photonic bandgap(PBG) structure. This method yields constantly wide suppression of parallel plate resonances from 0.9 GHz to 4.2 GHz and is very efficient to eliminate PCB resonances in a specified frequency region to provide effective suppression of simultaneous switching noise(SSN). It is shown that with only two cells the propagation of unwanted high frequency signals is effectively suppressed, while it could provide continuous return signal path. The measured results agree very well with theoretically predicted ones, and confirm that proposed method is effective for reducing EMI, with measured near-field distribution. The proposed topology is suitable for design of high speed digital system.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2011년도 추계학술대회
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• pp.63-65
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• 2011

현재 범용성이 높은 전자계 시뮬레이터가 널리 보급되어 왔으며, 안테나 설계, EMC 설계, 측정, 초고주파 소자 설계 등에 활용되고 있다. 본 연구에서는 X 밴드 영역에서 다양한 전자계 문제 해석을 목적으로 멀티 코어 기반 PC 자원을 보다 효율적으로 활용하고, 나아가 TCP/IP 기반 네트워크 토폴로지 구성을 통한 효율성 높은 전자계 시뮬레이터 구현을 위한 프레임워크 구축과 구현 방안을 제안한다.