• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.12
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• pp.776-781
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• 2017

In this study, we investigated the effect of electrode pattern design on the thermal shock resistance and temperature uniformity of a ceramic heater. A cordierite substrate with a low thermal expansion coefficient was fabricated by tape casting, and a tungsten electrode was printed and used as a heating element. The temperature distribution of the ceramic heater was calculated by a finite-element method (FEM) by considering various electrode patterns, and the tensile stress distribution due to the thermal stress was calculated. In the electrode pattern with a single-line width, the central part of the ceramic heater was heated to the maximum temperature, and the position of the ceramic heater having a double-line width was changed to the maximum temperature, depending on the position of the minimum line width pattern. The highest tensile stress was found along the edges of the ceramic heater. The temperature gradient at the edge determined the tensile stress intensity. The smallest tensile stress was observed for electrode pattern D, which was expected to be advantageous in resisting thermal shock failures in ceramic heaters.

• Journal of information and communication convergence engineering
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• v.5 no.1
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• pp.42-44
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• 2007

The a-Si:H TFTs decreasing parasitic capacitance of source-drain is fabricated on glass. The structure of a-Si:H TFTs is inverted staggered. The gate electrode is formed by patterning with length of $8{\mu}m{\sim}16{\mu}m$ and width of $80{\sim}200{\mu}m$ after depositing with gate electrode (Cr) $1500{\AA}$ under coming 7059 glass substrate. We have fabricated a-SiN:H, conductor, etch-stopper and photoresistor on gate electrode in sequence, respectively. The thickness of these, thin films is formed with a-SiN:H ($2000{\mu}m$), a-Si:H($2000{\mu}m$) and $n^+a-Si:H$ ($500{\mu}m$). We have deposited $n^+a-Si:H$, NPR(Negative Photo Resister) layer after forming pattern of Cr gate electrode by etch-stopper pattern. The NPR layer by inverting pattern of upper gate electrode is patterned and the $n^+a-Si:H$ layer is etched by the NPR pattern. The NPR layer is removed. After Cr layer is deposited and patterned, the source-drain electrode is formed. The a-Si:H TFTs decreasing parasitic capacitance of source-drain show drain current of $8{\mu}A$ at 20 gate voltages, $I_{on}/I_{off}$ ratio of ${\sim}10^8$ and $V_{th}$ of 4 volts.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.775-777
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• 2003

Several methods are available for the fabrication of electrode pattern for the plasma display panel(PDP) including screen printing and photolithographic method. Piezo type ink-jet printing method is considered to the method of choice for electrode patterning in manufacturing of PDP. Both silver ink and absorbent layer paste formulation were developed for ink-jet printing of electrode pattern. The ink-jet printing of silver electrode with preformed absorbent layer was especially suitable for the patterning of address electrode for high resolution PDP.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10a
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• pp.311-314
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• 1996

In contactless disk handling systems based on electrostatic suspension in which the stator is to be transferred, the limited stiffness in lateral direction severely restricts the achievable translational acceleration. In existing stator electrode pattern designs, the magnitude of the lateral force is determined by the magnitude of the control voltages which are applied to the individual electrodes to levitate the disk stably. As a result, the lateral force cannot be set arbitrarily. A new stator electrode pattern is presented for the electrostatic levitation of disk-shaped objects, in particular silicon wafers and aluminum hard disks, which allows the lateral forces to be controlled independently from the levitation voltages. Therefore, greater lateral forces can be obtained, compared with the existing stator designs. Experimental results will be presented for a 4-inch silicon wafer that clearly reveal the increased lateral stiffness by using the proposed stator electrode compared to the conventional electrode pattern.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.457-457
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• 2000

The display module of PDP consists of a pair of fine electrode patterned panels. For example, in case of 42" PDP, thousands of electrode patterns should be placed on panel, where length, width, and height of each pattern m one meter, 50${\mu}{\textrm}{m}$, and 30${\mu}{\textrm}{m}$ respectively. And pitch between patterns is around 200${\mu}{\textrm}{m}$. Electrode patterns are frequently damaged during the production process, and thus might be broken. These breakage will result in open-circuited electrical characteristic of a pattern and/or open-circuited electrical characteristic between patterns. Therefore, inspection of pattern defects is the inevitable process to improve production yield rate of the panel. In this paper, we first review several types of PDP pattern defects which affects yield-rate of PDP. And, problems of inspecting such pattern defects by a typical inspection method is addressed. Then, a novel inspection method is proposed to overcome the difficulties, where some new components and the algorithm to detect the electrode defects are explored.ored.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.43-44
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• 2006

We have studied electro-optical characteristics and stability of liquid crystal director depending on electrode patterning of common electrode on top substrate in patterned vertical alignment (PVA) mode. In the present studies, new type of common electrode pattern was suggested to enhance a dark state by reducing interference area due to data signal. According to the simulation result, PVA device with new common electrode pattern contributed to Improvement of an aperture ratio.

• Journal of Integrative Natural Science
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• v.4 no.4
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• pp.311-314
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• 2011

Application of self-assembled monolayers (SAMs) to the fabrication of organic thin film transistor has been recently reported very often since it can help to provide ohmic contact between films as well as to form simple and effective electrode pattern. Accordingly, quality of these ultra-thin films is becoming more imperative. In this study, in order to manufacture a high quality SAM pattern, a hydrophobic alkylsilane monolayer and a hydrophilic aminosilane monolayer were selectively coated on $SiO_2$ surface through the consecutive procedures of a micro-contact printing (${\mu}CP$) and dip-coating methods under extremely dry condition. On a SAM pattern cleaned with SC1 solution immediately after ${\mu}CP$, poly(3,4-ethylenedioxythiophene) (PEDOT) source and drain electrode array were very selectively and nicely vapour phase polymerized. On the other side, on a SC1-untreated SAM pattern, PEDOT array was very poorly polymerized. It strongly suggests that the SC1 cleaning process effectively removes unwanted contaminants on SAM pattern, thereby resulting in very selective growth of PEDOT electrode pattern.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.10
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• pp.1786-1791
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• 2016

The damage has occurred inside the semiconductor pattern When using conventional wet station for semiconductor. It was used for electrolytic ion water generator in order to prevent damage to the semiconductor pattern. It was designed and developed a flow path electrode and the mesh electrode to check the efficiency of the electrode. And It confirmed the expected results through the simulation of the flow path. and ORP were measured in accordance with the current and voltage of mesh electrode and flow paht electrodes. Flow path electrode 22A is 3V, up to pH 9.8, the value of ORP-558mV was measured and the mesh electrode was measured up to pH 9.8, ORP -350mV.

• Proceedings of the Optical Society of Korea Conference
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• 2007.07a
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• pp.285-286
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• 2007

Current distributions according to electrode patterns in vertical structured InGaN/GaN LED (light emitting diode) were investigated quantitatively by utilizing three dimensional electrical circuit modeling method. The uniformity of the injected current density in the active layer was compared among different electrode patterns. It was found that the current uniformity was greatly dependent on the electrode pattern in vertical InGaN/GaN LEDs.

• Bulletin of the Korean Chemical Society
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• v.34 no.9
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• pp.2781-2786
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• 2013

We examined the effect of electrode fingers and gaps of coplanar interdigitated electrode (IDE) structures to characterize the ammonium salt-containing polyelectrolyte film of resistance-based humidity sensors. IDEs designed for this purpose were flexible gold electrodes deposited on a polyimide substrate using a printing process because the geometry presents a potential for tunable sensitivity over other electrode designs. The basic design of the sensors consisted of IDEs with a different number of electrode fingers such as 3, 4, and 5 and gap sizes of 310, 360, 410, and $460{\mu}m$. Details of the AC complex impedance characteristics such as the Nyquist plot, Bode plot, and activation energy based on electrode construction were investigated.