• Electrical & Electronic Materials
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• v.9 no.1
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• pp.1-8
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• 1996

We investigated the effects of doping elements on the Bi-Sr-Ca-Cu-O ceramics. The doping elements can be classified into four groups depending on their supeconducting characteristics in the Bi-Sr-Ca-Cu-O structure. The first group of doping elements(Co, Fe, Ni and Zn) substitute into the copper site and can reduce the critical temperatures of the 2223 and 2212 phases. The second group of doping elements(Y and La) substitute into the Ca site and cause the disappearance of the 2223 phase and increase the critical temperatures in the 2212 phase. The third group of doping elements(P and K) have a tendency to decompose the superconducting phase and reduce the optimal sintering temperature. The fourth group of doping elements(B, Si, Sn and Ba) almost unaffected the superconductivity of the 2223 and 2212 phase.

• Transactions on Electrical and Electronic Materials
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• v.8 no.6
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• pp.234-240
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• 2007

The electrical properties and dc aging behavior for specified stress state of system, which is composed of quaternary Zn-Pr-Co-Cr, were investigated for different $Dy_2O_3$ addition doping level. As $Dy_2O_3$ doping level increased, the density decreased in the range of 5.51-4.90 $g/cm^3$, reaching maximum at 0.5 mol% and the average ZnO grain size decreased in the range of 17.7-6.0 ${\mu}m$. The incorporation of $Dy_2O_3$ significantly improved the non-ohmic properties, above 30 in non-ohmic coefficient, compared with that of undoped samples. The samples with the best performance of non-ohmic properties were obtained for $Dy_2O_3$ doping level of 1.0 mol%, with 49 in non-ohmic coefficient and 2.6 ${\mu}A/cm^2$ in leakage current. The samples with the highest stability were obtained for $Dy_2O_3$ doping level of 0.5 mol%.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.6
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• pp.445-449
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• 2020

Non-volatile memory is approaching its fundamental limits with the Si₃N₄ storage layer, necessitating the use of alternative materials to achieve a higher programming/erasing speed, larger storage window, and better data retention at lower operating voltage. This limitation has restricted the development of the charge-trap memory, but can be addressed by using high-k dielectrics. The paper reviews the doping of nitrogen, titanium, and yttrium on high-k dielectrics as a storage layer by comparing MONOS devices with different storage layers. The results show that nitrogen doping increases the storage window of the Gd₂O₃ storage layer and improves its charge retention. Titanium doping can increase the charge capture rate of HfO₂ storage layer. Yttrium doping increases the storage window of the BaTiO₃ storage layer and improves its fatigue characteristics. Parameters such as the dielectric constant, leakage current, and speed of the memory device can be controlled by maintaining a suitable amount of external impurities in the device.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1993.11a
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• pp.55-59
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• 1993

In this study, we developed new process for doping poly-Si film. Sb(antimony) thin film was used as doping source. Sb was evaporated on poly-Si film deposited by LPCVD fallowed by annealing. We investigate sheet resistance variation with annealing temperature and time. Finally we adapted this process to poly-Si TFT fabrication.

• Journal of the Korean Ceramic Society
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• v.37 no.2
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• pp.194-200
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• 2000

Sb-doped tin oxide films were deposited on Corning glass 1737 substrate by plasma enhanced chemical vapor deposition(PECVD) technique using a gas mixture of SnCl4/SbCl5/O2/Ar. The deposition behaviors of tin oxide films by PECVD were compared with those by thermal CVD, and effects of deposition temperature, r.f. power and Sb doping on the electrical properties of tin oxide films were investigated. PECVD technique largely increased the deposition rate and smoothed the surface of tin oxide films compared with thermal CVD. Electrical resistivity decreased with doping of Sb due to the increase of carrier concentration. However, large doping of Sb diminished carrier concentration and mobility due to the decrease of crystallinity, which resulted in the increase of electrical resistivity. As the deposition temperature and r.f. power increased, Cl content in the film decreased.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.291.2-291.2
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• 2016

3D semiconductor material of silicon that is used throughout the semiconductor industry currently faces a physical limitation of the development of semiconductor process technology. The research into the next generation of nano-semiconductor materials such as semiconductor properties superior to replace silicon in order to overcome the physical limitations, such as the 2-dimensional graphene material in 2D transition-metal dichalcogenide (TMD) has been researched. In particular, 2D TMD doping without severely damage of crystal structure is required different conventional methods such as ion implantation in 3D semiconductor device. Here, we study a p-type doping technique on tungsten diselenide (WSe2) for p-channel 2D transistors by adjusting the concentration of hydrochloric acid through Raman spectroscopy and electrical/optical measurements. Where the performance parameters of WSe2 - based electronic device can be properly designed or optimized. (on currents increasing and threshold voltage positive shift.) We expect that our p-doping method will make it possible to successfully integrate future layered semiconductor devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.5-5
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• 2008

We design and demonstrate the controled doping into ZnO nanowires (NWs) adopting self-contrived hot-walled pulsed laser deposition (HW-PLD). Optimized synthesis conditions with the diversified dopants guarantee the excellent crystalinity and morphology as well as electrical properties of the NWs. Proprietary target rotating system in the HW-PLD fuels the controlled formation and doping of the NWs. Prepared NWs sensitive to the environment are systematically characterized, and the doping mechanism is discussed.

• 한국태양에너지학회:학술대회논문집
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• 2011.11a
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• pp.149-153
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• 2011

The PC1D is widely used for modeling the properties of crystalline silicon solar cell. Optimized doping profile in crystalline silicon solar cell fabrication is necessary to obtain high conversion efficiency. Doping profile in the forms of a uniform, gaussian, exponential and erfc function can be simulated using the PC1D program. In this paper, the doping profiles including junction depth, dopant concentration on surface and the form of doping profile (gaussian, gaussian+erfc function) were changed to study its effect on electrical properties of solar cell. As decreasing junction depth and doping concentration on surface, electrical properties of solar cell were improved. The characteristics for the solar cells with doping profile using the combination of gaussian and erfc function showed better open-circuit voltage, short-circuit current and conversion efficiency.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.6
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• pp.487-490
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• 2010

This paper describes the elecrtical and optical characteristics of $N_2$ doped porous 3C-SiC films. Polycrystalline 3C-SiC thin films are anodized by $HF+C_2H_5OH$ solution with UV-LED exposure. The growth of in-situ doped 3C-SiC thin films on p-type Si (100) wafers is carried out by using APCVD (atmospheric pressure chemical vapor deposition) with a single-precursor of HMDS (hexamethyildisilane: $Si_2(CH_3)_6)$. 0 ~ 40 sccm $N_2$ was used for doping. After the growth of doped 3C-SiC, porous 3C-SiC is formed by anodization with $7.1\;mA/cm^2$ current density for anodization time of 60 sec. The average pore diameter is about 30 nm, and etched area is increased with $N_2$ doping rate. These results are attributed to the decrease of crystallinity by $N_2$ doping. Mobility is dramatically decreased in porous 3C-SiC. The band gaps of polycrystalline 3C-SiC films and doped porous 3C-SiC are 2.5 eV and 2.7 eV, respectively.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.4
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• pp.199-204
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• 2016

This paper was proposed floating island power MOSFET for lowering on state resistance and the proposed device was maintained 600 V breakdown voltage. The electrical field distribution of floating island power MOSFET was dispersed to floating island between P-base and N-drift. Therefore, we designed higher doping concentration of drift region than doping concentration of planar type power MOSFET. And so we obtain the lower on resistance than on resistance of planar type power MOSFET. We needed the higher doping concentration of floating island than doping concentration of drift region and needed width and depth of floating island for formation of floating island region. We obtained the optimal parameters. The depth of floating island was $32{\mu}m$. The doping concentration of floating island was $5{\times}1,012cm^2$. And the width of floating island was $3{\mu}m$. As a result of designing the floating island power MOSFET, we obtained 723 V breakdown voltage and $0.108{\Omega}cm^2$ on resistance. When we compared to planar power MOSFET, the on resistance was lowered 24.5% than its of planar power MOSFET. The proposed device will be used to electrical vehicle and renewable industry.