• Journal of Electrical Engineering and Technology
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• v.12 no.1
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• pp.217-224
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• 2017

The analysis and design process of the LCL filter with passive damping circuits for three-phase grid-connected inverter are presented based on the generalized model of LCL filter. Several types of the passive damping circuits in previous studies could be compared and analyzed by using the generalized model considering various design criteria of passive damping circuits. According to the analysis in this paper, a reasonable configuration of passive damping circuits for three-phase grid-connected inverters is proposed. The validity of the proposed design process is verified by informative simulation and experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.11
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• pp.2168-2174
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• 2009

Electrical railway system consists of rolling stock, track, signal and streetcar line system. Track circuit system is a vital system due to checking the location of trains. Track circuits are divided by using frequency and isolated electrically. Currently, there is not a regulation for the distance between track circuits using identical frequency. In case of installing additional track circuits in large stations or marshalling yard, the problem which is that the signal is not exactly transmitted to the track circuit occurs due to the mutual interference. In other words, the track circuit properly is not operated on account of wrong induction current by the mutual inductance between track circuits. In this paper, we suggest the electrical model between track circuits and numerically calculate demanded parameters in electrical model. The distance between track circuits satisfying the mutual inductance which does not happen to the mutual interference phenomenon is presented about the distance of track circuit. It is proved by using Matlab and PSpice program as the amplitude of mutual induced current.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.3
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• pp.166-176
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• 2007

Radio frequency (RF) microelectromechanical systems (MEMS) have been pursued for more than a decade as a solution of high-performance on-chip fixed, tunable and reconfigurable circuits. This paper reviews our research work on RF MEMS switches and switching circuits in the past five years. The research work first concentrates on the development of lateral DC-contact switches and capacitive shunt switches. Low insertion loss, high isolation and wide frequency band have been achieved for the two types of switches; then the switches have been integrated with transmission lines to achieve different switching circuits, such as single-pole-multi-throw (SPMT) switching circuits, tunable band-pass filter, tunable band-stop filter and reconfigurable filter circuits. Substrate transfer process and surface planarization process are used to fabricate the above mentioned devices and circuits. The advantages of these two fabrication processes provide great flexibility in developing different types of RF MEMS switches and circuits. The ultimate target is to produce more powerful and sophisticated wireless appliances operating in handsets, base stations, and satellites with low power consumption and cost.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.110-112
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• 2002

In this paper, a new technique for Thai isolated speech phoneme segmentation is proposed. Based on Thai speech feature, the isolated speech is first divided into low and high frequency components by using the technique of wavelet decomposition. Then the energy contour of each decomposed signal is computed and employed to locate phoneme boundary. To verity the proposed scheme, some experiments have been performed using 1,000 syllables data recorded from 10 speakers. The accuracy rates are 96.0, 89.9, 92.7 and 98.9% for initial consonant, vowel, final consonant and silence, respectively.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.70-73
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• 2002

High frequency digital LSI circuits are usually composed of many sub-circuits coupled with interconnects. They sometimes causes serious problems of the fault switching by time-delays, crosstalks, reflections of signals and so on. Therefore, it is very important to develop a user-friendly simulator for solving these problems. Although a moment matching method is widely used as the reduction technique of interconnects, it may happen to arise erroneous results for evaluating the poles far from the origin. In this paper, we show an asymptotic method in the complex frequency-domain, where we calculate the exact poles and residues giving large effect to the transient responses. Then, the interconnects are replaced by the asymptotic equivalent circuits using the poles and residues. Thus, we can develop a users-friendly simulator using the equivalent circuits.

• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1286-1288
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• 1994

Methods are described for the design and fabrication of the sensor circuits on the polarographic oxygen sensing electrodes. The discussion includes: a method for the +5V single-supply driving for the sensor circuits, a method of low power comsumption for the front-end electronics. Typical polarograms for the commercial DO probes using this sensor circuits are presented. High accuracy of the I to V conversion using the circuits is verified.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2795-2797
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• 1999

Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both voltage-fed and current-fed electronic ballast. The proposed PFC circuits use valley-fill(VF) type DC-link stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant capacitors. In current-fed type, the charge pump capacitors are connected with the additional secondary-side of the power transformer. The measured PF and THD are higher than 0.99 and 15% for all proposed PFC circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for implementing cost-effective electronic ballast.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.383-386
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• 2000

There are some variations in quiescent supply current or TTL SSIs. Thus, some variations in quiescent supply current of logic circuits made of TTL SSIs will be generated. The variations make it difficult to apply supply current test methods to tests of TTL circuits. In this paper, in order to examine the applicability to R circuits, fault coverages of a supply current test method for open faults in some ISCAS-85 benchmark circuits are evaluated, Which are made of TTL LS-type SSIs. The experimental results shows that if SSIs are used for implementation having the variation of quiescent supply current within 1%, supply current test methods are applicable for the tests.

• Journal of electromagnetic engineering and science
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• v.13 no.4
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• pp.233-239
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• 2013

This paper proposes an accurate approach for predicting transferred power from a noise source to integrated circuits based on the characteristics of the power transfer network. A power delivery trace on a package and a printed circuit board are designed to transmit power from an external source to integrated circuits. The power is demonstrated between an injection terminal on the edge of the printed circuit board and integrated circuits, and the power transfer function of the power distribution network is derived. A two-tier calibration is applied to the test, and scattering parameters of the network are measured for the calculation of the power transfer function. After testing to obtain the indispensable parameters, the real received and tolerable power of the integrated circuits can be easily achieved. Our proposed estimation method is an enhancement of the existing the International Electrotechnical Commission standard for precise prediction of the electromagnetic immunity of integrated circuits.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.642-645
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• 2003

We proposed new current source and mirror circuits insensitive to $V_{th}$ variation of poly-Si TFTs. The proposed circuits have been verified by SPICE simulation using poly-Si TFT model. The error currents of the proposed current source and current mirror circuits caused by $V_{th}$ variation reduced less than 6.6% and 4.5% of that of conventional ones, respectively.