• 한국정밀공학회지
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• 제26권9호
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• pp.64-71
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• 2009

Recently as ultrasonic medical devices are gradually developed, many of those require smaller and more precision coaxial cables in the probe. So, the use of micro coaxial cable becomes an efficient solution for ultrasonic machine. However, there are many difficulties in stripping micro coaxial cable by traditional mechanical process. In this paper we use the Nd:YAG laser for the efficient striping of conduct wire of cable. Through some experiments, we found that there is a new possibility in the proposed method. Also, we propose a pre-process of the cable before stripping in order to enhance the performance.

• 한국컴퓨터정보학회논문지
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• 제6권1호
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• pp.1-6
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• 2001

본 논문에서는 B-spline의 근사방법 중의 한 방법으로써 knot 제거 알고리즘을 제안한다. 이 알고리즘은 제거되는 knot의 순서에 영향을 받지 않고 항상 같은 결과를 얻을 수 있을 뿐만 아니라 수학적으로도 단순하므로 이해와 구현이 용이하다. 내부 knot들이 multiplicity를 많이 갖는 경우에 더 큰 장점을 갖는다.

• 한국컴퓨터정보학회논문지
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• 제9권3호
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• pp.157-161
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• 2004

본 논문은 간략화된 Lehmer totient 함수로 LUC 암호시스템을 효율적으로 복호화 할 수 있음을 제안한다. 기존 LUC 암호시스템 에 비하여 복호화된 메시지의 모호성과 중국인의 나머지정리 이용을 줄일 수 있다.

• 품질경영학회지
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• 제20권1호
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• pp.136-146
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• 1992

Most of scheduling papers on FMS have been considered that the fabrication process, the machining process and the assembly process etc. are independent and the releasing, routing, dependent, batching, loading problem are treated separetely. In this paper, we discuss that the integrated scheduling problem which can be solved for efficient use. We combine two systems that each process system which in order to produce a product is treated dependently, the releasing and the routing problem are combined one system and we present the efficient flexible manufacturing system as including the alternate process.

• 경영과학
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• 제19권2호
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• pp.155-168
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• 2002

In this paper, some efficient implementation techniques for the multifrontal method, which can be used to compute the Cholesky factor of a symmetric positive definite matrix, are presented. In order to use the cache effect in the cache-based computer architecture, a hybrid method for factorizing a frontal matrix is considered. This hybrid method uses the column Cholesky method and the submatrix Cholesky method alternatively. Experiments show that the hybrid method speeds up the performance of the supernodal multifrontal method by 5%～10%, and it is superior to the Cholesky method in some problems with dense columns or large frontal matrices.

• 한국경영과학회:학술대회논문집
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• 한국경영과학회 2006년도 추계학술대회
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• pp.201-204
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• 2006

In this paper, we propose efficient scheduling strategy for Multi-user MIMO systems that find advantageous trade off solution between multiuser diversity and spatial diversity, spatial multiplexing technique. Specifically, we suggest P-SFS(Pseudo-SNR Fair scheduling) algorithm that consider throughput and fairness problem. also we propose channel aware Antenna deployment that decide how to use assigned multiple antennas by the information of each user's channel condition.

• 한국시뮬레이션학회논문지
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• 제4권2호
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• pp.61-68
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• 1995

The performance of event-driven logic simulation frequently used for VLSI design verification depends on the data structures for event queues. This paper improves the existing Timing Wheel as a data structure for an event queue. In case of the use of B+ tree, an efficient node degree is also presented based on the experiment results. A new Timing Wheel index structure, which eliminates the insertion and deletion overhead of B+ tree, is proposed and analyzed.

• Journal of information and communication convergence engineering
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• 제7권2호
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• pp.219-222
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• 2009

An efficient interpolation FIR filter structure for high-density and low-power electronic devices is proposed. The proposed structure is based on polyphase decomposition property and look-up table method. By computer-aided design simulations, it is shown that the use of the proposed method can result in reduction in the number of gates by 54% and can reduce power consumption by 9%.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.357-360
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• 2002

This paper is proposed about an efficient pipelined architecture for 3D graphics accelerator to reduce Cache miss ratio. Because cache miss takes a considerable time, about 20∼30 cycle, we reduce cache miss ratio to use pre-fetch. As a result of simulation, we figure out that the miss ratio of cache depends on the size of tile, cache memory and auxiliary cache memory. We can save 6.6% cache miss ratio maximumly.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.285-288
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• 2000

In this paper, we propose a Reed-Solomon decoder for the DVD Reed-Solomon(RS) product code based on new efficient euclid cell architecture suitable for Modified Euclid Algorithm. We synthesized the RS decoder using Hyundai 0.65um CMOS standard cell library and compared the performance of the decoder with one of the conventional architectures. The result shows that the proposed euclid cell use about 32% less symbol time.