• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2003.09b
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• pp.129-132
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• 2003

This paper proposes a novel and efficient intelligent digital redesign technique for a Takagi-Sugeno (TS) fuzzy system. The term of intelligent digital redesign involves converting an existing analog fuzzy-model-based controller into an equivalent digital counterpart in the sense of state matching. In this paper, we suggest the discretization method based on the dual-rate sampling approximation is first proposed, and then attempt to globally match the states of the overall closed-loop TS fuzzy system with the pre-designed analog fuzzy-model-based controller and those with the digitally redesigned fuzzy-model-based controller. To show the feasibility and the effectiveness of the proposed method, a computer simulation is provided.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.1
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• pp.168-175
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• 2010

The issue of rejecting periodic disturbances arises in various applications dealing with rotating machinery. A new method using DIDF (Dual-Input Describing Function) is presented for the rejection of periodic disturbances with uncertain frequency. This can be added to an existing feedback control system without altering the closed-loop system stability. The objective is to design a nonlinear compensator to secure specified oscillation amplitude and frequency which are the same as disturbances. We suggest two procedures to determine coefficients for DIDF's synthesis. The structure of the proposed DIDF is so simple that we can easily synthesize. A number of computer simulations were carried out to demonstrate the salient feature of the proposed DIDF compared to the conventional ones(that is, adaptive algorithms).

• Structural Engineering and Mechanics
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• v.52 no.6
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• pp.1177-1191
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• 2014

Reinforced concrete (RC) shear walls are one of the most commonly used lateral-load resisting systems in high-rise buildings. RC Parallel redundancy walls studied herein consist of two parts nested to each other. These two parts have different mechanical behaviors and energy dissipation mechanisms. In this paper, experimental studies of four 1/2-scale specimens representing this concept, which are subjected to in-plane cyclic loading, are presented and test results are discussed. Two specimens consist of a wall frame with barbell-shaped walls embedded in it, and the other two consist of a wall frame and braced walls nested each other. The research mainly focuses on the failure mechanism, strength, hysteresis loop, energy dissipation capacity and stiffness of these walls. Results show that the RC parallel redundancy wall is an efficient lateral load resisting component that acts as a "dual" system with good ductility and energy dissipation capacity. One main part absorbs a greater degree of the energy exerted by an earthquake and fails first, whereas the other part can still behave as an independent role in bearing loads after earthquakes.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.1
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• pp.38-44
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• 2015

This paper presents the sensorless drive method for mono inverter dual parallel (MIDP) surface mounted permanent magnet synchronous motor (SPMSM) drive system. MIDP motor drive system is a technique that can reduce the cost of the multi motor driving system. To maximize this merit of the MIDP motor drive system, the sensorless technique is essential to eliminate the position sensors. This paper adopts an appropriate sensorless method for MIDP SPMSM drive system, which uses the reduced order observer and phase locked loop (PLL) to reduce the calculation burden. The I-F control method is implemented for start-up and low speed operation. The validity and performance of the proposed algorithm are shown via experiments with 600-W SPMSMs.

• Journal of the Korean Society of Industry Convergence
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• v.19 no.2
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• pp.69-74
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• 2016

This study proposes a new approach to design of the robust control application of a mobile manipulator with dual-arm. The mobil manipulator robot system consists of 12 DOF manipulators and a mobile robot. Kinematics of the robotics has been analyzed and simulated to verify reliability. A position-based torque control technique is applied to the robot by adding an outer loop to interact with the environment. Experimental studies of torque control applications of robot arm and interaction with a user operator are conducted. Experimental results has been proved that the robot arm performed regulated to follow the desired reference.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.3
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• pp.200-209
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• 2008

This paper describes bandwidth linearization techniques in phase-locked loop (PLL) design for common-clock serial link applications. Utilizing a continuously tunable single-input dual-path LC VCO and a constant-gain phase detector, a proposed architecture is well suited to implementing PLLs that must be compliant with standards that specify minimum and maximum allowable bandwidths such as PCI Express Gen2 or FB-DIMM applications. A prototype 4.75 to 6.1-GHz PLL is implemented in 90-nm CMOS. Measurement results show that the PLL bandwidth and random jitter (RJ) variations are well regulated and that the use of a differentially controlled dual-path VCO is important for deterministic jitter (DJ) performance.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.82.6-82
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• 2001

This paper presents the control X-Y table being the precise movement by point-to-point in the x-y plane. The dual modulus technique is used for our system to control the frequency of pulse supplied to the motors. Such technique is used to stop motor of both axes accurately as the desired target point in the same period. Both motors are stepping motor. To Improve steps per revolution, we employ ministep form to drive motors. In system, personal computer, using parallel port, is used for computing algorithm in open-loop form to control motors. In experiment, our system applies on the X-Y table for drawing to test system performance.

• ETRI Journal
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• v.41 no.3
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• pp.383-395
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• 2019

Clock Controlled Dual keeper Domino logic structures (CCDD_1 and CCDD_2) for achieving a high-speed performance with low power consumption and a good noise margin are proposed in this paper. The keeper control circuit comprises an additional PMOS keeper transistor controlled by the clock and foot node voltage. This control mechanism offers abrupt conditional control of the keeper circuit and reduces the contention current, leading to high-speed performance. The keeper transistor arrangement also reduces the loop gain associated with the feedback circuitry. Hence, the circuits offer less delay variability. The design and simulation of various wide fan-in designs using 180 nm CMOS technology validates the proposed CCDD_1 and CCDD_2 designs, offering an increased speed performance of 7.2% and 8.5%, respectively, over a conventional domino logic structure. The noise gain margin analysis proves good robustness of the CCDD structures when compared with a conventional domino logic circuit configuration. A Monte Carlo simulation for 2,000 runs under statistical process variations demonstrates that the proposed CCDD circuits offer a significantly reduced delay variability factor.

• Educational Technology International
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• v.10 no.2
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• pp.145-166
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• 2009

The purpose of this study was to investigate why advance organizers (AO) are effective in promoting comprehension and mental model formation in terms of cognitive load. Two experimental groups: a concept-map AO group and a key-word AO group and one control group were used. This study considered cognitive load in view of Baddeley's working memory model: central executive (CE), phonological loop (PL), and visuo-spatial sketch pad (VSSP). The present experiment directly examined cognitive load using dual task methodology. The results were as follows: central executive (CE) suppression task achievement for the concept map AO group was higher than the key word AO group and control group. Comprehension and mental model construction for the concept map AO group were higher than the other groups. These results indicated that the superiority of concept map AO owing to CE load decrement occurred with comprehension and mental model construction in learning. Thus, the available resources produced by CE load reduction may have been invested for comprehension and mental model construction of learning contents.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.11
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• pp.93-98
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• 2003

In this paper, we designed a printed square loop antenna for operating of PCS and IMT2000 band. The proposed antenna has omni-directional radiation patterns with broad bandwidth, similar to the conventional antenna, to easy feed on composing single planar. We obtain an ideal impedance matching and increase bandwidth. An antenna bandwidth is about 150MHz(1.74∼l.89〔GHz〕) at 1$^{st}$ resonance frequency and 290MHz(1.95∼2.24GHz) at 2$^{nd}$ resonance frequency on VSWR(equation omitted)1.5, and then we can obtain not only 1.73∼l.87 〔GHz〕 PCS band but also 1.92∼2.17 (GHz) IMT2000 band. band.