• Journal of the Semiconductor & Display Technology
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• v.5 no.3 s.16
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• pp.23-27
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• 2006

Recently, Top emission organic light-emitting diode (TEOLED) has been attracted by their potential application for the development of flat panel display (FPD). We have fabricated the high luminance top emission organic-emitting diode (TEOLED) using dual cathode layer and three top emitting structure. These devices were characterized by electroluminescence (EL) and current density-voltage (J-V) measurements. After compared it with Au anode structure, luminance of the device using dual anode was better than using without Al device. Consequently, Al layers are very good candidates for a promising electron-injecting buffer layer for top emission light-emitting diode (TEOLED).

• Journal of the Semiconductor & Display Technology
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• v.7 no.1
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• pp.47-51
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• 2008

The Al:Au double-layer metal electrode for use in transparent, dual emission of organic light-emitting diode (OLED) was fabricated. The electrode of Al:Au metals with various thicknesses was deposited by the vacuum thermal evaporation technique. For Al thickness of 1 nm, a bottom luminance of $4880\;cd/m^2$ was observed at 8 V. Otherwise, top luminance of $2020\;cd/m^2$ were observed at 8 V. In addition, the threshold voltages of the electrodes were 2.2 V. It was forward that the inserting 1 nm Al between LiF and Au enhanced electron injection with tunneling effect.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.463-466
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• 2000

According to the development of the semiconductor micro device technology, IC chip trends the high integrated, low power tendency. Nowadays, it can be showed the tendency of single chip in system level. But in the system level, IC operates by multi power supply voltages. So, semiconductor process is necessary for these multi power operation. Therefore, in this paper, dual gate high voltage device that operate by multi power supply of 5V and 20V fabricated in the 0.5${\mu}{\textrm}{m}$ CMOS process technology and its electrical characteristics were analyzed. The result showed that the characteristics of the 5V device almost met with the SPICE simulation, the SPICE parameters are the same as the single 5V device process. And the characteristics of 20V device showed that gate length 3um device was available without degradation. Its current was 520uA/um, 350uA/um for NMOS, PMOS and the breakdown voltages were 25V, 28V.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.13 no.4
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• pp.113-120
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• 2014

To ventilate indoor spaces, axial single-blade fans are widely used in various areas, such as schools, houses, offices, and restaurants. Recently, axial single-blade fans were developed to realize energy efficiency and noise reduction improvements. Here, an experimental study of the air flow characteristics of an axial dual-blade fan is conducted. The characteristics of the axial dual-blade fan were tested via an air flow analysis and with prototypes. For the performance of the fan, the flow rate, power consumption, and noise were evaluated. The result showed that the axial dual-blade fan uses less power and produces less noise in comparison with an axial single-blade fan.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.152-156
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• 2013

This paper presents a fast-lock dual-loop successive approximation register-controlled duty-cycle corrector (SARDCC) circuit using a mixed (binary+sequential) search algorithm. A wider duty-cycle correction range, higher operating frequency, and higher duty-cycle correction accuracy have been achieved by utilizing the dual-loop architecture and the binary search SAR that achieves the fast duty-cycle correcting property. By transforming the binary search SAR into a sequential search counter after the first DCC lock-in, the proposed dual-loop SARDCC keeps the closed-loop characteristic and tracks variations in process, voltage, and temperature (PVT). The measured duty cycle error is less than ${\pm}0.86%$ for a wide input duty-cycle range of 15-85 % over a wide frequency range of 0.5-2.0 GHz. The proposed dual-loop SARDCC is fabricated in a 0.18-${\mu}m$, 1.8-V CMOS process and occupies an active area of $0.075mm^2$.

• Journal of Information Processing Systems
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• v.13 no.6
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• pp.1516-1526
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• 2017

Many organizations today use patch management systems to uniformly manage software vulnerabilities. However, the patch management system does not guarantee the integrity of the patch in the process of providing the patch to the client. In this paper, we propose a method to guarantee patch integrity through dual electronic signatures. The dual electronic signatures are performed by the primary distribution server with the first digital signature and the secondary distribution server with the second digital signature. The dual electronic signature ensures ensure that there is no forgery or falsification in the patch transmission process, so that the client can verify that the patch provided is a normal patch. The dual electronic signatures can enhance the security of the patch management system, providing a secure environment for clients.

• 제어로봇시스템학회:학술대회논문집
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• 1990.10a
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• pp.773-778
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• 1990

In this paper, a reliable control system structured with dual CPU modules and dual I/O modules is implemented as a means of achieving a highly reliable fault tolerant control system. For this, faults in the system modules are first examined, and a fault detection technique consisting of self diagnostic, comparison process, and exception processing is applied. Also reliability analysis is conducted for the discrete time Markov model with dual structure. It is shown quantitatively that the reliability is improved in the control system with dual structure in comparison with a system with single module structure.

• Journal of Korean Society of Water and Wastewater
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• v.21 no.4
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• pp.485-491
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• 2007

The fluctuation of inlet flow to a water treatment plant makes a serious problem that it can change the filtration rate abruptly, and ultimately occur the breakthrough of the detained particles inside filter media. Also, since it takes very short time (about 10 minutes) for the surface wave occurred from the fluctuation of inlet flow to reach the filtration process, it is impossible to control the filtration rate stably. Therefore, this study was conducted to evaluate the effect of daily flow-rate fluctuation on the performance of sand filtration process, and to suggest the dual media composition for coping with that effect. Comparative column tests have been carried out for various dual media (sand and anthracite) compositions. From the results of column tests, dual media, especially in the case of sand 45cm/anthracite 30cm, is more effective to cope with the effect of flow-rate fluctuation on the performance of filtration than single media (only sand). In addition, irrespective of dual media composition, managing ability to cope with that fluctuation tends to be weak at the end of allowable filtration duration time,

• Journal of Welding and Joining
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• v.26 no.2
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• pp.85-91
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• 2008

In general, the quality of a welding process tends to vary with depending on the work environment or external disturbances. Hence, in order to achieve the desirable quality of welding, we should have the optimal welding condition that is not significantly affected by these changes in the environment or external disturbances. In this study, we used a dual response surface method in consideration of both the mean output variables and the standard deviation in order to optimize the V-groove arc welding process. The input variables for GMA welding process with the dual response surface are welding voltage, welding current and welding speed. The output variables are the welding quality function using the shape factor of bead geometry. First, we performed welding experiment on the interested area according to the central composite design. From the results obtained, we derived the regression model on the mean and standard deviation between the input and output variables of the welding process and then obtained the dual response surface. Finally, using the grid search method, we obtained the input variables that minimize the object function which led to the optimal V-groove arc welding process.

• The KIPS Transactions:PartA
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• v.11A no.3
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• pp.199-206
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• 2004

Under the multiprogrammed situation, the performance of multiprocessor system is affected by the process allocation policy of the operating systems. The lowest communication cost can be achieved when the related processes positioned to the adjacent processors. While the effective allocation is quite difficult to the real situation, and the processing of the allocation policy consumes some computation time. The dual-ring CC-NUMA systems exhibit a quite performance difference according to the process a1location policy due to a lot of unbalanced memory transactions on the interconnection networks. In this paper, I propose a load balanced dual-link CC-NUMA system that does not requires the processes allocation policy. By the program-driven simulation results. the proposed system shows no remarkable difference according to the allocation policy while the dual-ring systems shows 10％ performance improvement by the process allocation. In addition, the proposed system outperforms the dual~ring systems about 1.5 times.