• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.10
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• pp.17-22
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• 2004

We developed a new ANGLED display driving method which used both amplitude and pulse width modulation. For pulse width modulation, we divided a picture frame time into S sub-frames. For amplitude modulation, we used three OLED luminance(or current) levels which were controlled by TFT's gate voltages. By combining these two modulation methods, we obtained 35(=243) grey levels. And we designed a new data electrode driving circuit block with two shift registers without using DAC's. To verify the feasibility, we simulated the key circuit components by HSpice with TFT parameters extracted from current-voltage characteristics of 6${\mu}{\textrm}{m}$ channel length polysilicon TFT's. From the simulation results, we found that 320${\times}$240, dual scan, 243 grey level AMOLED display can be designed with this method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.110-111
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• 2006

이중 에피층을 가지는 SOI (Silicon-On-Insulator) RESURF(REduced SURface Field) LIGBT(Lateral Insulated Gate Bipolar Transistor) 소자의 에피층 두께에 따른 항복전압 특성을 분석하였다. 이중 에 피층 구조를 가지는 SOI RESURF LIGBT 소자는 전하보상효과를 얻기 위해 기존 LIGBT 소자의 n 에피로 된 영역을 n/p 에피층의 이중 구조로 변경한 소자로 n/p 에피층 영역내의 전하간 상호작용에 의해 에피 영역 전체가 공핍됨으로써 높은 에피 영역농도에서도 높은 항복전압을 얻을 수 있는 소자이다. 본 논문에서는 LIGBT 에피층의 전체 두께와 농도를 고정한 상태에서 n/p 에피층의 두께가 변하는 경우에 항복전압 특성의 변화에 대해 simulation을 통해 분석하였다.

• The Korean Journal of Nuclear Medicine
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• v.39 no.3
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• pp.191-199
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• 2005

Purpose: In order to obtain better quantitation of kidney uptake, this study is to evaluate a conjugate view method (CVM) using a geometric mean attenuation correction for kidney uptake and to compare it to Gate's method. Materials & Methods: We used a Monte Carlo code, SIMIND and a Zubal phantom, to simulate kidney uptake. SIMIND was both simulated with or without scatter for the Zubal phantom. Also, a real phantom test was carried out using a dual-head gamma camera. The activity of 0.5 mCi was infused into two small cylinder phantoms of 5 cm diameter, and then, they were inserted into a cylinder phantom of 20 cm diameter. The results by the CVM method were compared with ideal data without both of attenuation and scatter and with Gate's method. The CVM was performed with or without scatter correction. The Gate's method was performed without scatter correction and it was evaluated with regards to $0.12cm^{-1}\;and\;0.15cm^{-1}$ attenuation coefficients. Data were analyzed with comparisons of mean counts in the legions of interest (ROI), profiles drawn over kidney images and linear regression. Correlation coefficients were calculated with ideal data, as well. Results: In the case of the computer simulation, mean counts measured from ideal data, the CVM and the Gate's method were (right $998{\pm}209$, left: $896{\pm}249$), (right: $911{\pm}207$, left: $815{\pm}265$), and (right: $1065{\pm}267$, left: $1546{\pm}267$), respectively. The ideal data showed good correlation with the CVM and the correlation coefficients of the CVM, Gate's method were (right: 0.91, left: 0.93) and (right: 0.85, left: 0.90), respectively. Conclusion: The conjugate view method using geometric mean attenuation correction resulted in better accuracy than the Gate's method. In conclusion, the conjugate view method independent of renal depths may provide more accurate kidney uptake.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.1
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• pp.1-10
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• 2003

Device characteristics of the Metal-Ferroclecric-Semiconductor FET(MFSFET) are simulated in this study. The field-dependent polarization model and the square-law FET model are employed in our simulation. C-V$_{G}$ curves generated from our MFSFET simulation exhibit the accumulation, the depletion and the inversion regions clearly. The capacitance, the subthreshold and the drain current characteristics as a function of gate bias exhibit the memory windows are 1 and 2 V, when the coercive voltages of ferroelectric are 0.5 and 1 V respectively. I$_{D}$-V$_{D}$ curves are composed of the triode and the saturation regions. The difference of saturation drain currents of the MFSFET device at the dual threshold voltages in I$_{D}$-V$_{D}$ curve is 1.5, 2.7, 4.0, and 5.7 ㎃, when the gate biases are 0, 0.1, 0.2 and 0.3V respectively. As the drain current is demonstrated after time delay, PLZT(10/30/70) thin film shows excellent reliability as well as the decrease of saturation current is about 18 % after 10 years. Our simulation model is expected to be very useful in the estimation of the behaviour of MFSFET devices.T devices.

• Proceedings of the Korean Society of Medical Physics Conference
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• 2003.09a
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• pp.44-44
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• 2003

As a basic measurement tool in the areas of animal models of human disease, gene expression and therapy, and drug discovery and development, small animal PET imaging is being used increasingly. An ideal small animal PET should have high sensitivity and high and uniform resolution across the field of view to achieve high image quality. However, the combination of long narrow pixellated crystal array and small ring diameter of small animal PET leads to the degradation of spatial resolution for the source located at off center. This degradation of resolution can be improved by determining the depth of interaction (DOI) in the crystal and by taking into account the information in sorting the coincident events. Among a number of 001 identification schemes, dual layer phsowich detector has been widely investigated by many research groups due to its practicability and effectiveness on extracting DOI information. However, the effects of each crystal length composing dual layer phoswich detector on DOI measurements and image qualities were not fully characterized. In order to minimize the DOI effect, the length of each layer of phoswich detector should be optimized. The aim of this study was to perform simulations using a simulation tool, GATE to design the optimum lengths of crystals composing a dual layer phoswich detector. The simulated small PET system employed LSO front layer LuYAP back layer phoswich detector modules and the module consisted of 8${\times}$8 arrays of dual layer crystals with 2 mm ${\times}$ 2 mm sensitive area coupled to a Hamamatsu R7600 00 M64 PSPMT. Sensitivities and variation of radial resolutions were simulated by varying the length of LSO front layer from 0 to 10 mm while the total length (LSO + LuYAP) was fixed to 20 mm for 10 cm diameter ring scanner. The radial resolution uniformity was markedly improved by using DOI information. There existed the optimal lengths of crystal layers to minimize the variation of radial resolutions. In 10 cm ring scanner configuration, the radial resolution was kept below 3.4 mm over 8 cm FOV while the sensitivity was higher than 7.4% for LSO 5 mm : LuYAP 15 mm phoswich detector. In this study, the optimal length of dual layer phoswich detector was derived to achieve high and uniform radial resolution.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.4
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• pp.332-338
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• 2002

High current coil power supply for superconductivity coil of tokamak requires fast dynamics performance of di/dt and smooth change over of current direction. To meet the specification high performance DSP-based controller Is designed for 12-pulse thyristor dual converter with interphase transformer(IPT). Not only the total current of Y and $\Delta$ converter units but also the difference for those should be regulated fast and accurately. Proportional and integral controller is designed for current difference control and the controller output is compensated to $\Delta$ converter. The source voltage phase angle detection and gate pulse generation algorithm are implemented in software for higher reliability of current control. The current error Is reduced by selection of appropriate initial gating angle during the transient of change over of current direction between thyristor converters.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.12A
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• pp.1172-1176
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• 2008

In this paper, we describe the implementation and performance of a dual-mode Software Define Radio (SDR) smart antenna base station system. SDR technology enables a communication system to be reconfigured through software downloads to the flexible hardware platform that is implemented using programmable devices such as Digital Signal Processors (DSPs), Field Programmable Gate Arrays (FPGAs), and microprocessors. The presented base station channel card comprises the physical layer (pHY) including the baseband modem as well as the beamforming module. This channel card is designed to support TDD High-Speed Downlink Packet Access (HSDPA) as well as Wireless Broadband Portable Internet (WiBro) utilizing the SDR technology. We first describe the operations and functions required in WiBro and TDD HSDPA. Then, we explain the channel card design procedure and hardware implementation. Finally, we evaluate WiBro and TDD HSDPA performance by simulation and actual channel-card-based processing. Our smart antenna base-station dual-mode channel card shows flexibility and tremendous performance gains in terms of communication capacity and cell coverage.

• ETRI Journal
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• v.37 no.6
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• pp.1143-1153
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• 2015

In this paper, we propose an efficient architecture for a real-time image stitching engine for vision SoCs found in motor vehicles. To enlarge the obstacle-detection distance and area for safety, we adopt panoramic images from multiple telegraphic cameras. We propose a stitching method based on a fixed homography that is educed from the initial frame of a video sequence and is used to warp all input images without regeneration. Because the fixed homography is generated only once at the initial state, we can calculate it using SW to reduce HW costs. The proposed warping HW engine is based on a linear transform of the pixel positions of warped images and can reduce the computational complexity by 90% or more as compared to a conventional method. A dual-core SW/HW image stitching engine is applied to stitching input frames in parallel to improve the performance by 70% or more as compared to a single-core engine operation. In addition, a dual-core structure is used to detect a failure in state machines using rock-step logic to satisfy the ISO26262 standard. The dual-core SW/HW image stitching engine is fabricated in SoC with 254,968 gate counts using Global Foundry's 65 nm CMOS process. The single-core engine can make panoramic images from three YCbCr 4:2:0 formatted VGA images at 44 frames per second and frequency of 200 MHz without an LCD display.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.11
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• pp.23-29
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• 2008

This paper presents a new conceptual electromagnetic induction eddy current based stainless steel plate spiral type heater for heat exchanger or dual packs heater in hot water system boiler steamer and super heated steamer, which is more suitable and acceptable for new generation consumer power applications. In addition, an active clamping quasi-resonant PWM high frequency inverter using trench gate IGBTs power module can operate under a principle of zero voltage soft commutation with PWM is developed and demonstrated for a high efficient induction heated hot water system and boiler in the consumer power applications. This consumer induction heater power appliance using active clamping soft switching PWM high frequency inverter is evaluated and discussed on the basis of experimental results.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.1585-1587
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• 2004

이중 에피층 구조를 가지는 SOI(Silicon-On-Insulator) LIGBT(Lateral Insulated Gate Bipolar Transistor)의 에피층 두께 변화에 따른 항복전압 특성을 분석하였다. 제안된 소자는 전하보상효과를 얻기 위해 n/p-epi의 이중 에피층 구조를 사용하였으며, 에피층 전체에 걸쳐서 전류가 흐를 수 있도록 하기 위해 trenched anode구조를 채택하였다. 본 논문에서는 n/p-epi층의 농도를 고정시킨 후 각각의 epi층의 두께를 변화시켜가며 simulation을 수행하였을 때 항복전압의 변화 및 표면과 epi층에서의 전계분포변화를 분석하였다.