• 한국전자파학회논문지
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• 제15권2호
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• pp.140-144
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• 2004

직렬 공진형 공통 소스 접지 트랜지스터 쌍은 선택형 이중 밴드 LNA에 가장 널리 사용되는 구조이다. 본 논문은 이러한 선택형 이중밴드 저잡음 증폭기를 동시에 서로 다른 주파수에서 구동하였을 때 나타나는 잡음지수의 악화 정도를 해석하고, 0.18$\mu\textrm{m}$ CMOS 공정으로 구현한 LNA의 실험 결과와 비교한다. 아울러, 잡음 해석을 통해 다른 밴드 LNA로부터 발생하는 트랜지스터의 채널 잡음과 전원 잡음의 기여도를 분석하고, 동시형 LNA로 사용하였을 때 잡음을 최소화하기 위한 정합구조를 제안한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2007년도 하계종합학술대회 논문집
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• pp.127-128
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• 2007

A dual band LNA is designed to set input matching and noise matching with source transmission feedback for wireless LAN applications. Some design techniques for the transmission line feedback of the dual band LNA have been developed with input and output design equations. The measured results shows close agreement with the simulated performance.

• 대한전자공학회논문지TC
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• 제44권7호통권361호
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• pp.23-28
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• 2007

본 논문에서는 무선 랜용 이중대역 GaAs FET 저잡음 증폭기를 설계하기 위하여 인덕턴스 소스 피드백을 이용하고 입력 단에는 이중대역 LC 공진회로를 이용하였으며, 출력단에는 Cheyshev 필터의 임피던스 변환 회로를 이용하였다. 이중대역 증폭기의 입출력정합회로 설계에 필요한 기법 및 수식들을 유도하였으며 설계된 증폭기를 제작하여 측정한 결과 시뮬레이션 결과와 유사한 측정치를 얻을 수 있었다.

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2007년도 학술대회
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• pp.3-6
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• 2007

In this paper, a hybrid dual band LNA(Low Noise Amplifier) with a tunable matching circuit using varactor is designed for 433MHz and 912MHz RFID reader. The operating frequency is controlled by the bias voltage applied to the varactor. The measured results demonstrate that S21 parameter is 16.01dB and 10.72dB at 433MHz and 912MHz, respectively with a power consumption of 19.36mW. The S11 are -11.88dB and -3.31dB, the S22 are -11.18dB and -15.02dB at the same frequencies. The measured NF (Noise Figure) is 15.96dB and 7.21dB at 433MHz and 912MHz, respectively. The NF had poorer performance than the simulation results. The reason for this discrepancy was thought that the input matching is not performed exactly and a varactor in the input matching circuit degrades the NF characteristics.

• 전기학회논문지
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• 제60권12호
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• pp.2286-2292
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• 2011

In this paper we present the design of Low Noise Amplifier(LNA), mixer and filter for RF front-end part of partial discharge monitoring system. The monitoring system of partial discharge in high voltage power machinery is used to prevent many kinds of industrial accidents, and is usually composed of three parts - sensor, RF front-end and digital microcontroller unit. In our study, LNA, mixer and filter are key components of the RF front-end. The LNA consists of common gate and common source-cascaded structure and uses the resistive feedback for broad band matching. A coupled line structure is utilized to implement the filter, of which size is reduced by the meander structure. The mixer is designed using dual gate structure for high isolation between RF and local oscillator signal.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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• pp.168-172
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• 2003

This paper analyzes the output noise and the noise figure of common source MOSFET pair each input of which is separately driven in the different frequencies. This analysis is performed for concurrent dual band cascode CMOS LNA with double inputs and single output fabricated in $0.18{\mu}m$ CMOS process. Since both inputs and output are matched to near $50{\Omega}$ using on-chip inductors, the measured noise figures are much higher than those of usual CMOS LNA. But, the main concern of this paper is focused on the added noise features due to the other channel common source stage. The dual-band LNA results in noise figure of 4.54dB at 2.14GHz and 6.03dB at 5.25GHz for selectable operation and 7.44dB and 6.58dB for concurrent operation. The noise analysis explains why the added noise at each band shows so large difference.

• 전기전자학회논문지
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• 제23권3호
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• pp.917-924
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• 2019

This paper presents a wideband low noise amplifier (LNA) that is suitable for LTE-Advanced and 5G communication standards employing carrier aggregation (CA). The proposed LNA encompasses a common input stage and a dual output second stage with a buffer at each distinct output. This architecture is targeted to operate in both intra-band (contiguous and non-contiguous) and inter-band CA. In the proposed design, the input and second stages employ a gm enhancement with resistive feedback technique to achieve self-biasing, enhanced gain, wide bandwidth as well as reduced noise figure of the proposed LNA. An up/down power controller controls the single input single out (SISO) and single input multiple outputs (SIMO) modes of operation for inter-band and intra-band operations. The proposed LNA is designed with a 45nm CMOS technology. For SISO mode of operation, the LNA operates from 0.52GHz to 4.29GHz with a maximum power gain of 17.77dB, 2.88dB minimum noise figure and input (output) matching performance better than -10dB. For SIMO mode of operation, the proposed LNA operates from 0.52GHz to 4.44GHz with a maximum voltage gain of 18.30dB, a minimum noise figure of 2.82dB with equally good matching performance. An $IIP_3$ value of -6.7dBm is achieved in both SISO and SIMO operations. with a maximum current of 42mA consumed (LNA+buffer in SIMO operation) from a 1.2V supply.

• 정보통신설비학회논문지
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• 제9권4호
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• pp.153-157
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• 2010

In this paper, a dual band LNA (Low Noise Amplifier) with a LC-tank matching circuit is designed for 912MHz and 2.45GHz RFID reader. The operating frequency is decided by the LC-tank resonance. The simulated results demonstrate that S21 parameter is 11.683dB and 5.748dB at 912MHz and 2.45GHz, respectively, and the S11 are -10.796dB and -21.261dB, the S22 are -7.131dB and -14.877dB at the same frequencies. The measured NF (Noise Figure) is 0.471 and 1.726 at 912MHz and 2.45GHz, respectively.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 Techno-Fair 및 합동춘계학술대회 논문집 전기물성,응용부문
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• pp.151-152
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• 2008

In this paper, a dual band LNA (Low Noise Amplifier) with a matching circuit using varactor diode is designed for 912MHz and 2450MHz RFID system. The operating frequency is controlled by the bias voltage applied to the varactor diode. The measured results demonstrate that gain is 13.6dB and 6.8dB at 912MHz and 2450MHz. The measured NF (Noise Figure) is 1.4dB and 3.1dB at 912MHz and 2450MHz, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권2호
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• pp.147-155
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• 2002

This paper describes RF front-end transceiver chipset for the dual-mode operation of PCS-Korea and IMT-2000. The transceiver chipset has been implemented in a $0.25\mutextrm{m}$ single-poly five-metal CMOS technology. The receiver IC consists of a LNA and a down-mixer, and the transmitter IC integrates an up-mixer. Measurements show that the transceiver chipset covers the wide RF range from 1.8GHz for PCS-Korea to 2.1GHz for IMT-2000. The LNA has 2.8~3.1dB NF, 14~13dB gain and 5~4dBm IIP3. The down mixer has 15.5~16.0dB NF, 15~13dB power conversion gain and 2~0dBm IIP3. The up mixer has 0~2dB power conversion gain and 6~3dBm OIP3. With a single 3.0V power supply, the LNA, down-mixer, and up-mixer consume 6mA, 30mA, and 25mA, respectively.