• 한국HCI학회:학술대회논문집
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• 2008.02b
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• pp.380-385
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• 2008

To perform the navigation functions more efficiently, the navigation menu structure should be provided easy to understand to the driver in the vehicle environment that is restricted by driving workload, According to these conditions, to design better navigation interface, it is important to study on the navigation menu structure that is depend on the screen size and the information width and depth. Therefore, in this study we provided the different menu structures of 7-inch touchscreen LCD and 4-inch touchscreen LCD to the driver respectively in the driving simulator. Then, we compared the preference of each menu structures with the different touchscreen LCD.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.7
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• pp.1346-1363
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• 1994

Packet voice protocols have been realized in many research works. But few studies for the interconnection of LAN and PABX to facilitate the voice communication have been done. In this paper, the gateway to interconnect the Ethernet LAN with the existing PABX telephone network for voice communication has been designed and implemented. The implemented gateway protocol is a modified protocol based on CCITT`s G.764 packetized voice protocol. To accomplish this goal the hardware system has been realized, which is divided into five parts: interface part with the telephone line, voice-processing part, PC interface part, controller part, and finally DTMF part. And the gateway software is divided into three parts: interface to make use of the packet driver which drives the network card, driver to drive the PABX gateway, and the protocol handling part.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.673-676
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• 2003

In this paper, we designed the embedded system used for wireless LAN communication. Embedded system kernel is made from general linux kernel 2.4.18 by applying the ARM patch (2.4.18-rmk7) and the SA1100 patch(2.4.18-rmk7), then porting board level suitable to target system. The SA-1110 PCMCIA interface provides controls for one PCMCIA card slot with a PSKTSEL pin for support of a second slot. The embedded system requires external logic to complete the PCMCIA socket interface. For dual-voltage support, level shifting buffers are required for all SA-1110 input signals. Hot insertion capability requires that each socket be electrically isolated from each other, and from the remainder of the memory system. embedded system is for socket services approaching PCMCIA socket, detecting number of sockets, sensing insertion and removal, and applying power. It also provides interface with Card services. Embedded system supports Host driver for lucent chips that is installed orinoco driver cross compiled. The meaning can say that is doing wireless LAN communication through wireless LAN in imbedded system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.2
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• pp.1-6
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• 2002

In this paper, an Analog Flat Panel interface(AFPI) which supports for UXGa(Ultar extended Graphics Array)-Compatible TFT LCD Driver is designed. The Proposed AFPI is composed of 8-b ADC, Automatic Gain Control(AGC), Low-Jitter PLL. In order to obtain a high speed and low power consumption, an efficient architecture of 8-bit ADC is proposed, whose FR(Folding Rate) is 8, NFB(Number of Folding Block) is 2, and IR (Interpolating Rate) is 16. We can get high SNDR by adopting distributed track and hold circuits. Also a programmable AGC which is possible to control gain and clamp, and a low-jitter PLL are proposed. The chip has been fabricated with 0.25${\mu}{\textrm}{m}$ 1-poly S-metal n-well CMOS technology. The effective chip area is 3.6mm $\times$ 3.2mm and it dissipates about 602㎽ at 2.5V power supply. The INL and DNL are within $\pm$ 1LSB. The measured SNDR is about 43㏈, when the input frequency is 10MHz at 200MHz clock frequency.

• The Transactions of the Korea Information Processing Society
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• v.4 no.10
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• pp.2521-2532
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• 1997

The next generation internet protocol, IPv6, have been developed by the IETF according to the requirements of enhancement of classic IP protocols to satisfy the lack of Internet address space as well as the support of multimedia applications. This paper presents an implementation of IPv6 protocols on the Windows NT kernel environment. In this work, we developed and also tested the basic functions, required for operating as an IPv6 host, such as IPv6 header processing, IPv6 address handling, control message processing, group membership processing and neighbor discovery functions. The implemented IPv6 protocol driver module is connected to the lower network interface card through NDIS, a standard network interface. And this driver module that operates within kernel, is implemented as it is connected to upper user applications and lower NDIS using dispatch and lower-edge functions. The developed IPv6 protocol driver can provide not only enhanced performance because it is implemented in kernel mode, but also convenience of usage to the application developers because it gives user interface as a dynamic link library.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2021.10a
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• pp.205-207
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• 2021

The way to develop an IoT device is to mount the sensor required by the application on a platform such as Arduino or Raspberry Pi, and write the sensor driver and application. At this time, if the driving driver for the sensor has already been written and the application can access the driver as a standardized API, then Plug&Play of the sensor will be possible. The old way to do this is because the sensor interface is too complicated to use on the current platform. In this paper, when a standardized sensor and driver with a USB terminal are plugged into the Raspberry Pi, we propose a method for automatically installing the driver. Application developers can get sensor values through Linux's file access API without worrying about sensor drivers. The proposed technique is currently being implemented on Raspberry-Pi.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.7
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• pp.10-16
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• 1999

This paper describes a low voltage swing bus driver using FCSR(Feedback Control Swing voltage Reduction) which can control bus swing voltage within a few hundred of mV. It is proposed to reduce power consumption in On-chip interface, especially for MDL(Merged DRAM Logic) architecture wihich has wide and large capacitance bus. FCSR operates on differential signal dual-line bus and on precharged bus with block controlling fuction. We modeled driver and bus to scale driver size automatically when bus environment is variant. We also modeled coupling capacitance noise(crosstalk) of neighborhood lines which operate on odd mode with parallel current source to analysis crosstalk effect in the victim-line according as voltage transition in the aggressor-line and environment in the victim-line. We built a test chip which was designed to swing 600mV in bus, shows 70Mhz operation at 3.3V, using Hyundai 0.8um CMOS technology. FCSR operate with 250Mhz at 3.3V by Hspice simulation.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.4
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• pp.49-58
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• 2014

A low-swing differential near-ground signaling (NGS) transceiver for low-power high-speed mobile I/O interface is presented. The proposed transmitter adopts an on-chip regulated programmable-swing voltage-mode driver and a pre-driver with asymmetric rising/falling time. The proposed receiver utilizes a new multiple gain-path differential amplifier with feed-forward capacitors that boost high-frequency gain. Also, the receiver incorporates a new adaptive bias generator to compensate the input common-mode variation due to the variable output swing of the transmitter and to minimize the current mismatch of the receiver's input stage amplifier. The use of the new simple and effective impedance matching techniques applied in the transmitter and receiver results in good signal integrity and high power efficiency. The proposed transceiver designed in a 65-nm CMOS technology achieves a data rate of 13 Gbps/channel and 0.3 pJ/bit (= 0.3 mW/Gbps) high power efficiency over a 10 cm FR4 printed circuit board.

• Journal of IKEEE
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• v.14 no.3
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• pp.190-198
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• 2010

This paper describes a auto focus piezo actuator driver IC for portable digital camera. The 80[V] DC voltage is generated by a DC-DC converter and supplied to power of piezo moving control circuit. The voltage of piezo actuator needs range -20[V] to 80[V] proportional to 1[Vp-p] input control voltages. The dimensions and number of external parts are minimized in order to get a smaller hardware size. IIC(Inter-IC) interface logic is designed for data interface and it makes debugging easy, test for mass productions. The power consumption is around 40[mW] with supply voltage of 3.6[V]. This device has been fabricated in a 0.6[um] double poly, triple metal 100[V] BCD MOS process and whole chip size is 1600*1500 [$um^2$].

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.34 no.5
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• pp.88-92
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• 2006

Proto Flight Model of Reaction Wheel Assembly Interface Unit(RIU) for STSAT-2 was developed. The RIU of STSAT2 has three major functions for interface between satellite system and RWAs. It has switches for RWA main power, communication Mux. and communication line driver.