• Journal of IKEEE
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• v.14 no.2
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• pp.51-57
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• 2010

A CMOS rail-to-rail high voltage buffer amplifier is proposed to drive the gamma correction reference voltage of large TFT LCD panels. It is operating by a single supply and only shows current consumption of 0.5mA at 18V power supply voltage. The circuit is designed to drive the gamma correction voltage of 8-bit or 10-bit high resolution TFT LCD panels. The buffer has high slew rate, 0.5mA static current and 1k$\Omega$ resistive and capacitive load driving capability. Also, it offers wide supply range, offset voltages below 50mV at 5mA constant output current, and below 2.5mV input referred offset voltage. To achieve wide-swing input and output dynamic range, current mirrored n-channel differential amplifier, p-channel differential amplifier, a class-AB push-pull output stage and a input level detector using hysteresis comparator are applied. The proposed circuit is realized in a high voltage 0.18um 18V CMOS process technology for display driver IC. The circuit operates at supply voltages from 8V to 18V.

• ETRI Journal
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• v.36 no.6
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• pp.924-930
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• 2014

This paper presents a $0.13{\mu}m$ CMOS 3-level envelope delta-sigma modulation (EDSM) RF signal generator, which synthesizes a 2.6 GHz-centered fully symmetrical 3-level EDSM signal for high-efficiency power amplifier architectures. It consists of an I-Q phase modulator, a Class B wideband buffer, an up-conversion mixer, a D2S, and a Class AB wideband drive amplifier. To preserve fast phase transition in the 3-state envelope level, the wideband buffer has an RLC load and the driver amplifier uses a second-order BPF as its load to provide enough bandwidth. To achieve an accurate 3-state envelope level in the up-mixer output, the LO bias level is optimized. The I-Q phase modulator adopts a modified quadrature passive mixer topology and mitigates the I-Q crosstalk problem using a 50% duty cycle in LO clocks. The fabricated chip provides an average output power of -1.5 dBm and an error vector magnitude (EVM) of 3.89% for 3GPP LTE 64 QAM input signals with a channel bandwidth of 10/20 MHz, as well as consuming 60 mW for both channels from a 1.2 V/2.5 V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.12
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• pp.22-29
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• 2009

In this paper, we developed the 200-Watts SSPA(Solid State Power Amplifier) for the X-band pulse compression solid state radar. The developed X-band SSPA is consists of 3-stage CSA(Corporate Structured Amplifier) modules in pre-amplifier stage, driver-amplifier stage and main-power amplifier stage. The main-power amplifier stage of SSPA designed by balanced type using GaN HEMT with enough power and gain to generate power more than 200-Watts in X-band. The developed SSPA has performance with more than total gain 59dB and output power 200-Watts in condition of frequency range 9.2-9.6GHz, pulse period 1msec, pulse width 100usec and duty cycle 10%. The developed SSPA in this paper can apply to high quality solid state radar system with pulse compression technique.

• Journal of Satellite, Information and Communications
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• v.5 no.2
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• pp.82-86
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• 2010

In this paper, a power amplifier module for WCDMA base-station applications is designed and implemented using GaN field-effect transistors (FETs), which uses an envelope tracking bias system. The designed module consists of an high gain MMIC amplifier, a driver amplifier, a power amplifier, and bias circuits for envelope tracking applications. Especially, a FET bias sequencing circuit and two isolators are integrated for stable RF operations. All circuits are assembled within a single housing, so its dimension is just $17.8{\times}9.8{\times}2.0\;cm3$. Measured results show that the developed power amplifier module has good envelope tracking capability: the power-added efficiency of 35% at the output power range from 30dBm to 40dBm over a wide range of drain bias.

• Journal of Power Electronics
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• v.16 no.1
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• pp.362-373
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• 2016

The on-line measurement of high-power IGBT collector current is important for the hierarchical control and short-circuit and overcurrent protection of its driver and the sensorless control of the converter. The conventional on-line measurement methods for IGBT collector current are not suitable for engineering measurement due to their large-size, high-cost, low-efficiency sensors, current transformers or dividers, etc. Based on the gate driver, this paper has proposed a current measuring circuit for IGBT collector current. The circuit is used to conduct non-intervention on-line measurement of IGBT collector current by detecting the voltage drop of the IGBT power emitter and the auxiliary emitter terminals. A theoretical analysis verifies the feasibility of this circuit. The circuit adopts an operational amplifier for impedance isolation to prevent the measuring circuit from affecting the dynamic performance of the IGBT. Due to using the scheme for integration first and amplification afterwards, the difficult problem of achieving high accuracy in the transient-state and on-state measurement of the voltage between the terminals of IGBT power emitter and the auxiliary emitter (u_Ee) has been solved. This is impossible for a conventional detector. On this basis, the adoption of a two-stage operational amplifier can better meet the requirements of high bandwidth measurement under the conditions of a small signal with a large gain. Finally, various experiments have been carried out under the conditions of several typical loads (resistance-inductance load, resistance load and inductance load), different IGBT junction temperatures, soft short-circuits and hard short-circuits for the on-line measurement of IGBT collector current. This is aided by the capacitor voltage which is the integration result of the voltage uEe. The results show that the proposed method of measuring IGBT collector current is feasible and effective.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.7
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• pp.710-716
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• 2007

In this paper, I study on the realization of 900 MHz 1 W power amplifier using a harmonic rejection circuit. The proposed harmonic rejection circuit has improved the harmonic rejection characteristic and overcoming the problems related with frequency reproducibility on the microstrip line. The proposed power amplifier, fabricated by the type of hybrid with the epoxy PCB, was composed of driver stage and power amplifier stage with harmonic rejection circuit. The fabricated power amplifier shows -24 dBc and -30 dBc of harmonic rejection characteristic at 2nd and 3rd harmonic compared with that is not used, respectively and it could be replace the filter located between an output stage and an antenna.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.10A
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• pp.1072-1077
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• 2007

In this paper, a power amplifier intermodulation distortion has been analyzed to improve linearity and the analysis results are used to minimize the distortion for linear power amplifier design. The proposed design technique is which the intermodulation distortions of the final amplifier are removed by driver intermodulation distortions. This proposed technique is based on AM to AM distortion analysis using power series, and AM to PM distortion analysis results using Bessel function. To verify this technique implement a cellular HPA(High Power Amplifier) 30W. From the results of the implementation and measurement for the linear power amplifier, the spurious characteristic is shown as 50 dBc at 1.98 MHz with 30 W with 20FA. These results show that distortion characteristics are improved as much as 10 dB in spurious characteristic compared with conventional design method.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.609-610
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• 2006

A 77GHz MMIC transceiver module consisting of a power amplifier, a low noise amplifier, a drive amplifier, a frequency doubler and a down-mixer has been developed for automotive forward-looking radar sensor. The MMIC chip set was fabricated using $0.15{\mu}m$ gate-length InGaAs/InAlAs/GaAs mHEMT process based on 4-inch substrate. The power amplifier demonstrated a measured small signal gain of over 20dB from $76{\sim}77GHz$ with 15.5dBm output power. The chip size is $2mm{\times}2mm$. The low noise amplifier achieved a gain of 20dB in a band between $76{\sim}77\;GHz$ with an output power of 10dBm. The chip size is $2.2mm{\times}2mm$. The driver amplifier exhibited a gain of 23dB over a $76{\sim}77\;GHz$ band with an output power of 13dBm. The chip size is $2.1mm{\times}2mm$. The frequency doubler achieved an output power of -16dBm at 76.5GHz with a conversion gain of -16dB for an input power of 10dBm and a 38.25GHz input frequency. The chip size is $1.2mm{\times}1.2mm$. The down-mixer demonstrated a measured conversion gain of over -9dB. The chip size is $1.3mm{\times}1.9mm$. The transceiver module achieved an output power of 10dBm in a band between $76{\sim}77GHz$ with a receiver P1dB of -28dBm. The module size is $8{\times}9.5{\times}2.4mm^3$. This MMIC transceiver module is suitable for the 77GHz automotive radar systems and related applications in W-band.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.3
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• pp.380-388
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• 2011

In this paper, we developed the X-band 63 watt pulsed SSPA(Solid State Power Amplifier) by using HMIC(Hybrid Microwave Integrated Circuits). The pulsed SSPA consists of power supply and 3-stage amplifier modules : pre-amplifier stage, driver-amplifier stage, final-amplifier stage. The developed pulsed SSPA provides more than 63 watts of output power with a short pulse width and the duty cycle of up to 1.2 % at $70^{\circ}C$. The fabricated module offers great than 37 dB of saturated gain across the operating band. Input and output VSWR is <1.5:1. This module has an average current of 400 mA typical and operates at a +28 $V_{dc}$ supply. The developed SSPA in this paper can apply to pulsed Doppler radar with high speed operation.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.3
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• pp.47-55
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• 1996

An optical transmitter, which is a key component of the optical transmission system, converts the electrical signal to optical signal and consists of a high-speed current-pulse driver for laser diode and low-speed feedback loops that stabilize optical power against aging, power supply voltage fluctuations, and ambient temperature changes. In this paper, the power-stabilizing part, which forms the bulk of the optical transmitter circuitry was designed in integrted circuits. Operational amplifiers and reference voltage generation circuits, which were identified as key building blocks for the power-stabilizing feedback loops, were designed and were subsequently verified through HSPICE simulations. The designed operational amplifier consists of a two-stage folded cascode amplifier and class AB output stage, whereas the reference voltage is obtained by bandgap reference circuits. Finally the power-stabilizing circuitry was laid out based on 3\mu$m CMOS design rules for fabrication.