• The Transactions of the Korean Institute of Electrical Engineers
• /
• v.43 no.2
• /
• pp.244-250
• /
• 1994

This paper presents the design of a new turn-off gate drive circuit for GTO which can accomplish faster turn-off switching. The major disadvantage of the conventional turn-off gate drive technique is that it has a difficulty in realizing high negative diS1GQT/dt because of VS1RGM(maximum reverse gate voltage) and stray inductances of turn-off gate drive circuit[1~2]. The new trun-off gate drive technique can overcome this problem by adding another turn-off gate drive circuit to the conventional turn-off gate drive circuit. Simulation and experimental results of the new turn-off gate drive circuit in conjunction with chopper circuit verify a faster turn-off switching performance.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
• /
• v.11B no.3
• /
• pp.112-118
• /
• 2001

In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.

• Journal of the Institute of Electronics Engineers of Korea TE
• /
• v.42 no.3
• /
• pp.7-12
• /
• 2005

In this paper, we used class D amplification circuit to improve the decline of error rate caused by low impedance in the Power Line Communication. We manufactured voltage drive circuit and current drive circuit that are driven circuit of power line modem on the present and made a comparison experiment with drivel circuit that uses class D amplifier proposed in this paper. As a result of Experiment, We showed that it has great superiority over other existing drive circuits at rapid impedance change in power line channel.

• 제어로봇시스템학회:학술대회논문집
• /
• 2003.10a
• /
• pp.1881-1884
• /
• 2003

In some requirements of dc motor drive circuit applications are high quality output with generation of low internal conducted EMI. However the conventional dc motor drive circuits have been usually using unbalanced circuit which generates the high conducted EMI to the frame ground. This paper presents a balanced dc motor drive circuit which is effective way to reduce the common-mode noise. The circuit balancing is to make the noise pick up or occurring in both conductor lines, signal path and return path is equal in amplitude and opposite phase so that it will cancel out in the frame ground. The common-mode conducted noise reduction of this proposed dc motor drive is confirmed by experimental results.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.1301-1304
• /
• 2005

In this paper, we used class D amplification circuit proposed to improve the decline of error rate caused by rapidly variable impedance in the Power Line Communication. We manufactured voltage drive circuit and current drive circuit that are driven circuit of power line modem on the present. And with the same power line modem, we made a comparison experiment applying the driver circuit that used class D amplifier proposed in this paper. As a result of Experiment, We showed that it has more superior than other existing drive circuits at the impedance change in the power line communication.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.16 no.1
• /
• pp.67-75
• /
• 2002

This paper presents a PLD design of Gray Mode Graphic STN LCD drive circuit using PC interface. The proposed LCD drive circuit doesn\`t use microprocessor for the convenience of users. Thus, the LCD drive circuit can transfer efficiently image data created under PC to LCD. The LCD drive circuit which is modelled in schematic capture, AHDL and VHDL is simulated in functionally through the use of ALTERA MAX+PLUS II. Also, timing simulation is performed by ALTERA EPM7192SQC160-15 PLD implementation. The PC interface part have been programmed in MS-Visual C++ 6.0. The validity and efficiency of the proposed LCD drive circuit have been verified by test board. After comparing this LCD drive circuit to specify it was verified that the developed LCD drive circuit showed good performances, such as convenience of users, low cost.

• The KIPS Transactions:PartA
• /
• v.9A no.1
• /
• pp.53-60
• /
• 2002

This paper describes a Gray Mode Graphic STN LCD drive circuit using USB interface. The drive circuit using USB interface can highly transfer image data created under PC t LCD. Hence, the LCD drive circuit doesn't use microprocessor for the convenience of users. The proposed LCD drive circuit part have been verified by simulation and by ALTERA EPF10K10TC144-3 FPGA implementation in VHDL. The USB interface part have been programmed in MS-Visual C++ 6.0. The validity and efficiency of the proposed LCD drive circuit have been verified by test board. After comparing this LCD drive circuit to specify it was verified that the developed LCD drive circuit showed good performances, such as convenience of users, low cost.

• Proceedings of the KIEE Conference
• /
• 1995.07a
• /
• pp.325-327
• /
• 1995

A new gate drive circuit of classic converter for a switched reluctance motor is presented. Conventional gate drive circuit usually consists of the isolated power supplies and signal transferring devices for isolation, such as photo coupler, pulse transformer, and gate drive chips. The proposed gate drive circuit consists of resistors, capacitors, and zenor diodes without isolated power supplies, that make the drive circuit simple and reduce the material cost. The operational modes are classified and analyzed. The characteristics of the phase current and the gate signal of upper switches is investigated with the variation of duty ratio through the experiments.

• Journal of Power Electronics
• /
• v.9 no.2
• /
• pp.259-266
• /
• 2009

In order to increase the power density of power converters, reduction of the switching losses at high-frequency switching conditions is one of the most important issues. This paper presents a new gate drive circuit that enables the reduction of switching losses in both the Power MOSFET and the IGBT. A distinctive feature of this method is that both the turn-on loss and the turn-off loss are decreased simultaneously without using a conventional ZVS circuit, such as the quasi-resonant adjunctive circuit. Experimental results of the switching loss of both the Power MOSFET and the IGBT are shown. In addition, an energy recovery circuit suitable for use in IGBTs that can be realized by modifying the proposed gate drive circuit is also proposed. The effectiveness of both the proposed circuits was confirmed experimentally by the buck-chopper circuit.

• Journal of the Korea Institute of Military Science and Technology
• /
• v.5 no.1
• /
• pp.45-58
• /
• 2002

In this paper, we designed the circuit of drive control for towing winch. It is composed of reference voltage circuit for driving voltage reference, low pass filter circuit for noise reduction, dead zone circuit for initial transient input, and driving circuit for drum direction/velocity control. Also it is realized a drive control circuit for towing winch drum in accordance with PWM(pulse width modulation) method to suit it's purpose of a large capacity driving system. The performance of the designed circuit is analyzed by experiments and the appliablity for driving the towing winch drum satisfactorily is evaluated through a various testing.