• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2010년도 하계학술대회 논문집
• /
• pp.356-356
• /
• 2010

In this paper, Poly silicon thin-film transistors (poly-Si TFTs) with employed the SPC (Solid phase crystallization) and ELA (Excimer laser annealing) methods on glass panel substrate are fabricated to investigate the electrical poperies. Poly-Si TFTs have recess-channel structure with formated source/drain regions by LPCVD n+ poly Si in low $650^{\circ}C$ temperature. the ELA-TFT show higher on/off current ratio and subthreshold swing than a-Si and SPC TFT that therefore, these results showed that the ELA-TFT might be beneficial for practical embedded TFT memory device application.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제13권5호
• /
• pp.530-537
• /
• 2013

An explicit surface potential calculation method of gate-all-around MOSFET (GAAMOSFET) devices which takes into account both interface trap charge and varying doping levels is presented. The results of the method are extensively verified by numerical simulation. Results from the model are used to find qualitative and quantitative effect of interface trap charge on subthreshold slope (SS) of GAAMOSFET devices. Further, design constraints of GAAMOSFET devices with emphasis on the effect of interface trap charge on device SS performance are investigated.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(I)
• /
• pp.775-778
• /
• 1987

Double-diffused metal oxide power semiconductor field effect transistors are used extensively in recent years in various circuit applications. The temperature variation of the drain current at a fixed bais shows both positive and negative resistance characteristics depending on the gate threhold voltage and gate-to source bias voltage. In this study, the decision method of the internal temperature measurement by $V_{GS}$ and $V_{DS}$ are presented.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 1999년도 추계학술대회 논문집
• /
• pp.598-601
• /
• 1999

There is currently considerable interest in the applications of conjugated polymers, oligomers and small molecules for thin-film electronic devices. Organic materials have potential advantages to be utilized as semiconductors in field effect transistor and light emitting didoes. In this study, Pentacene thin film transistors(TFTs) were fabricated on glass substrate. Aluminum and Gold wei\ulcorner used fur the gate and source/drain electrodes. Silicon dioxde was deposited as a gate insulator by PECVD and patterned by R.I.E. The semiconductor layer of pentacene was thermally evaporated in vaccum at a pressure of about 10$^{-8}$ Torr and a deposition rate 0.3$\AA$/sec. The fabricated devices exhibited the field-effect mobility as large as 0.07cm$^2$/Vs and on/off current ratio larger than 10$^{7}$

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2015년도 추계학술대회 논문집
• /
• pp.85-86
• /
• 2015

In this paper, the bidirectional DC-DC converter is composed of the 900V Silicon-Carbide(SiC) devices to get high efficiency. The 900V SiC device is better than a similar current rated traditional SiC device. it has a lower drain-source resistance and output capacitance. therefore it can reduce the switching and the conduction losses of the DC-DC converter. The experimental results verify the improvement of efficiency and usefulness of 900V SiC device.

• 한국산학기술학회논문지
• /
• 제7권2호
• /
• pp.168-174
• /
• 2006

본 연구는 분자동력학 시뮬레이션을 이용하여 탄소 나노튜브를 이용한 전계효과 이온-전송 소자를 분석하였다. 외부 전기장에 의해 단전자 전계효과 트랜지스터 및 나노크기의 데이터 저장 장치로 활용될 수 있는 원리를 규명하였다. 외부 전기장이 증가할수록 칼륨 원자는 채널을 빠르게 통과하였다. 낮은 외부 전계에서는 나노채널의 열적 파동이 칼륨 원자의 터널링에 영향을 주게 됨을 해석하였다. 이로서 외부 전계의 강도에 따라 칼륨원자의 채널을 터널링하는 효과를 제어할 수 있는 메커니즘을 도출하였다.

• 한국정보전자통신기술학회논문지
• /
• 제13권5호
• /
• pp.403-411
• /
• 2020

기존에 진성난수 생성기를 위한 베타선 센서 회로의 아날로그 회로와 비교기 회로에 사용되는 파워와 그라운드 라인은 서로 공유하므로 비교기 회로의 디지털 스위칭에 의해 발생되는 파워와 그라운드 라인에서의 전압강하가 CSA를 포함한 아날로그 회로의 출력 신호 전압이 감소하는 원인이었다. 그래서 본 논문에서는 디지털 스위칭 노이즈의 source인 비교기 회로에 사용되는 파워와 그라운드 라인을 아날로그 회로의 파워와 그라운드 라인과 분리하므로 CSA(Charge Sensitive Amplifier) 회로를 포함한 아날로그 회로의 출력신호전압이 감소되는 것을 줄였다. 그리고 VREF(=1.195V) 전압을 VREF_VCOM과 VREF_VTHR 전압으로 변환해주는 전압-전압 변환기 회로는 PMOS current mirror를 통해 IREF를 구동할 때 PMOS current mirror의 드레인 전압이 다른 경우 5.5V의 고전압 VDD에서 channel length modulation effect에 의해 각각의 current mirror를 통해 흐르는 구동 전류가 달라져서 VREF_VCOM과 VREF_VTHR 전압이 감소하는 문제가 있다. 그래서 본 논문에서는 전압-전압 변환기 회로의 PMOS current mirror에 PMOS 다이오드를 추가하므로 5.5V의 고전압에서 VREF_VCOM과 VREF_VTHR의 전압이 down되지 않도록 하였다.

• 한국전기전자재료학회논문지
• /
• 제19권12호
• /
• pp.1140-1143
• /
• 2006

We report on the fabrication of P3HT-based thin-film transistors (TFTs) for liquid crystal display that consist of $NiO_x$, poly-vinyl phenol (PVP), and Ni for the source-drain (S/D) electrodes, gate dielectric layer, and gate electrode, respectively The $NiO_x$ S/D electrodes of which the work function is well matched to that of P3HT are deposited on a P3HT channel by electron-beam evaporation of NiO powder. The maximum saturation current of our P3HT-based TFT is about $15{\mu}A$ at a gate bias of -30 V showing a high field effect mobility of $0.079cm^2/Vs$ in the dark, and the on/off current ratio of our TFT is about $10^5$. It is concluded that jointly adopting $NiO_x$ for the S/D electrodes and PVP for gate dielectric realizes a high-quality P3HT-based TFT.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
• /
• pp.69-70
• /
• 2000

There are currently considerable interest in the applications of conjugated polymers, oligomers, and small molecules for thin-film electronic devices. Organic materials have potential advantages to be utilized as semiconductors in field-effect transistors and light-emitting diodes. In this study, pentacene thin-film transistors (TFTs) were fabricated on glass substrate. Aluminums were used for gate electrodes. Silicon dioxide was deposited as a gate insulator by PECVD and patterned by reactive ion etching (R.I.E). Gold was used for the electrodes of source and drain. The active semiconductor pentacene layer was thermally evaporated in vacuum at a pressure of about $10^{-8}$ Torr and a deposition rate $0.3{\AA}/s$. The fabricated devices exhibited the field-effect mobility as large as 0.07 $cm^2/V.s$ and on/off current ratio as larger than $10^7$.

• Journal of Electrical Engineering and information Science
• /
• 제2권6호
• /
• pp.202-207
• /
• 1997

Design and fabrication issues for an L-band GaAs Monolithic Microwave Integrated Circuit(MMIC) Voltage Controlled Oscillator(VCO) as a component of Personal Communications Systems(PCS) Radio Frequency(RF) transceiver are discussed. An ion-implanted GaAs MESFET tailored toward low current and low noise with 0.5mm gate length and 300mm gate width has been used as an active device, while an FET with the drain shorted to the source has been used as the voltage variable capacitor. The principal design was based on a self-biased FET with capacitive feedback. A tuning range of 140MHz and 58MHz has been obtained by 3V change for a 600mm and a 300mm devices, respectively. The oscillator output power was 6.5dBm wth 14mA DC current supply at 3.6V. The phase noise without any buffer or PLL was 93dB/1Hz at 100KHz offset. Harmonic balance analysis was used for the non-linear simulation after a linear simulation. All layout induced parasitics were incorporated into the simulation with EEFET2 non-linear FET model. The fabricated circuits were measured using a coplanar-type probe for bare chips and test jigs with ceramic packages.