• 한국유체기계학회 논문집
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• 제17권2호
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• pp.41-47
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• 2014

Experimental results are given for the vertical motion of water in the water chambers for wave energy converter aligned along the wave propagation direction in order to avoid the impulsive wave forces. This paper mainly focuses on the property of the amplitude of the vertical motion of the water surface in the chambers. The amplification has been investigated by dimensionless parameters of wave period to resonance period ratio of the U-shaped oscillation, $T/T_r$, chamber size to wave length ratio, l/L, water depth to wave length ratio, h/L, amplitude of up-down motion of water particles to draft of the front wall ratio, ${\zeta}/D$. It has been shown that l/L should be less than 0.1 and as $T/T_r$ approaches unity the up-down of the water in the chambers is amplified. Also, the structure of the walls which form th water chambers has been examined roughly. It is deduced that the chambers set on both sides of the hull of a single-point moored floating vessel is preferable to those set along a fixed structure such as breakwaters.

• 대한전자공학회논문지TC
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• 제43권12호
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• pp.16-23
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• 2006

본 논문은 msec.이하의 짧은 펄스형 신호를 탐지하기 위해 RF 하향변환기에서 직접 변환 방식을 수행하고, 방위 추정에 CVDF (Correlation Vector Direction Finding) 기법을 사용하는 고속 방향탐지기의 개발에 관한 것이다. 선정된 5-채널 등간격 원형 배열구조에서 방향탐지기의 구성 및 특징을 간단히 기술하고 고속 신호수신을 위해 직접 변환을 아날로그 I/Q 복조기에 적용하여 동조시간을 제거하는 기술을 설명한다. 또한 상기 모델에 대한 CRLB(Cramer-Rao Lower Bound)를 유도하고, 2종의 상관형 백터 방향탐지 기법인 LSE 기반 및 상관계수형 알고리즘의 원리를 기술하고 SNR, 샘플수, 이격거리비 변화에 따른 성능을 비교하여 그 특징을 살펴본다. 직접 변환 기법을 사용한 RF 하향변환기 프로토타입을 제작하고, 2종의 상관형 백터 방향탐지 기법을 적용하여 그 성능을 분석하였다 분석 결과, 모호성 발생에 대한 내성은 상관계수형 알고리즘이 양호한 반면, 나머지 조건에서 LSE 기반 알고리즘이 우수한 것으로 조사되었고, 이 결과는 시뮬레이션 결과와 일치하는 것을 확인하였다.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2016년도 추계학술대회
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• pp.66-69
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• 2016

본 논문에서는 차세대 4K/8K-UHD 위성 방송용 고화질 영상전송을 고려한 Ka-band 위성 통신 방송용 수신기 저 잡음 하향 변환기의 설계방안을 제시하였다. Ka-band은 Ku-band 보다 대기 중의 감쇄가 크기 때문에 강우에 따른 고화질 전송신호 품질에 대한 보상을 위하여 최저 수신감도의 레벨을 향상시키기 위하여 수신기의 동적영역(Dynamic Range)을 크게 확장하도록 저 잡음하향변환기를 설계 하였다. 수신단에서 비선형 특성을 고려하여 저 잡음정합을 3단 증폭기(LNA), 이미지 제거용 대역통과필터(BPF), 주파수 혼합기(Mixer), 주파수 체배기, IF단을 구성하였으며 수신단의 동적영역에 직접 영향을 미치는 파라미터들 사이에서 최적화 과정을 거쳐 LNB를 설계하였다. 설계된 감쇄-대역 저 잡음 하향변환기는 전체 이득이 58.5~60.7dB이며, 잡음지수는 1.38dB로 매우 우수한 특성을 보이며 국부발진기의 위상잡음은 -63.10dBc@100Hz 특성을 나타내었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.1361-1363
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• 2002

Micro-SMES(Superconducting Magnetic Energy Storage) has been studied as an impulsive high power supply for industrial applications. Recently, electric power reliability of our country has been improved. However, there are still remaining problems which are short-duration variations like instantaneous and momentary interruption and voltage sag by nature calamity ; typhoon, lightning, snow, etc. Besides, power quality ; harmonics, goes down because of using power electronics equipments. Malfunction of controller and stop machinery, and losing important data are caused by poor power quality at a couple of second in accuracy controllers. Due to those, battery based UPS has been used, but there are several disadvantages ; long charge and discharge time, environmental problem by acid and heavy metal, and short life time. Micro-SMES is an alternative to settle problems mentioned above. However, there need huge system apparatuses in order to verify the effect of system efficiency and stability considering the size of micro-SMES, the sort of converter type, and various conditions. This paper presents a cost effective simulation method of micro-SMES and power converter, and design for micro-SMES based system using PSCAD/EMTDC.

• 전자공학회논문지C
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• 제35C권4호
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• pp.50-59
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• 1998

This paper describes a 3.3V 8bit CMOS digital to analog converter (DAC) with two state current cell metrix architecture which consists of a 4 MSB and a 4 LSB current matrix stage. The symmetric two stage current cell matrix architecture allow the designed DAC to reduce hot only a complexity of decoding logics, but also a number of wider swing cascode curent mirros. The designed DAC with an active chip area of 0.8 mm$_{2}$ is fabricated by a 0.8 .mu.m CMOS n-well standard digital process. The experimental data shows that the rise/fall time, the settling time, and INL/DNL are6ns, 15ns, and a less than .+-.0.8/.+-.0.75 LB, respectively. The designed DAC is fully operational for the power supply down to 2.0V, such that the DAC is suitable for a low voltage and a low power system application. The power dissipation of the DAC with a single power supply of 3.3V is measured to be 34.5mW.

• Journal of Power Electronics
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• 제17권2호
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• pp.522-532
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• 2017

This paper presents a novel integrated structure for a cascaded distribution static compensator (D-STATCOM) and distribution transformer for medium-voltage reactive power compensation. The cascaded multilevel converter is connected to a system via a group of special designed taps on the primary windings of the Dyn11 connection distribution transformer. The three-phase winding taps are symmetrically arranged and the connection point voltage can be decreased to half of the line-to-line voltage at most. Thus, the voltage stress for the D-STATCOM is reduced and a compromise between the voltage rating and the current rating can be achieved. The spare capacity of the distribution transformer can also be fully used. The working mechanism is explained in detail and a modified control strategy is proposed for reactive power compensation. Finally, both simulation and scaled-down prototype experimental results are provided to verify the feasibility and effectiveness of the proposed connection structure and control strategy.

• ETRI Journal
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• 제29권4호
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• pp.421-429
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• 2007

This paper presents a direct-conversion CMOS transceiver for fully digital DS-UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase-locked loop (PLL), and a voltage controlled oscillator (VCO). A single-ended-to-differential converter is implemented in the down-conversion mixer and a differential-to-single-ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0 $mm^2$ die using standard 0.18 ${\mu}m$ CMOS technology and a 64-pin MicroLead Frame package. Experimental results show the total current consumption is 143 mA including the PLL and VCO. The chip has a 3.5 dB receiver gain flatness at the 660 MHz bandwidth. These results indicate that the architecture and circuits are adaptable to the implementation of a wideband, low-power, and high-speed wireless personal area network.

• 전기전자학회논문지
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• 제19권3호
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• pp.371-377
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• 2015

본 논문은 공용 데이터링크용 RF 송수신기 설계 및 제작에 관한 것이다. 송신부는 주파수 상향변환부, 전력증폭부, 듀플렉서로 구성된다. 수신부는 듀플렉서, 저잡음증폭부, 주파수 하향변환부로 구성된다. 최대 전송 거리, 수신 감도 등의 전기적 특성과 온도 특성을 충족하도록 설계되었다. RF 송수신기의 요구 규격을 만족하기위해 모델링 및 시뮬레이션을 이용하여 설계 및 구현하였다. 송신 출력과 잡음 지수는 각각 38.58dBm 및 5.5dB로 측정되었다. 전기적 특성 시험 및 온도 특성 시험으로 요구사항을 모두 만족함을 확인하였다.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2007년도 춘계학술대회 논문집
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• pp.804-808
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• 2007

when electric traction system used DC 1500V runs on decline of rail road track and slows down, Dc voltage goes beyond regular voltage. In this case extra power is forcibly wasted by resister because rectifier of substation and electric train including power converter and so on are out of order. This paper described a DC electric railway system, which can generate the excessive DC power form DC bus line to AC source in substation for traction system. The proposed regeneration inverter system for DC traction can be used as both an inverter and an active power filter(APF). As a regeneration inverter mode, it can recycle regenerative energy caused by decelerating tractions and as an active power filter mode, it can compensate for harmonic distortion produced by the rectifier substation. In addition, electric traction system products harmonic current and voltage distortion and reactive power because power converter is used so regeneration inverter normally runs such as active power filter(APF) for improving power quality. From the viewpoint of both power capacity and switching losses, the system is designed on the basis of three phase PWM inverters and composed of parallel inverters, output transformers, and an LCL filter.

• 한국통신학회논문지
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• 제27권8B호
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• pp.826-833
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• 2002

일반적으로 10GHz이상의 초고속 전송에서는 전송 성능면에서 RZ 형태가 NRZ 형태보다 우수하다고 알려져 있다. 본 연구에서는 광섬유 루프미러내의 편광제어기를 이용하여 SOA에서의 XPM을 조절할 수 있는 RZ 데이터를 위한 파장변환기를 제안하였으며, 이의 시뮬레이션을 수행하여 출력을 예측하였고, 10Gbps RZ 데이터에 대한 실험을 통해 이를 확인하였다. 제안된 구조는 기존의 XPM 구조에 비하여 보다 저가의 편광 의존형 SOA를 하나만 필요로 하며, 입력 데이터에 대해 반전 및 비반전된 파장변환 출력신호를 두개의 출력에서 동시에 얻을 수 있는 장점이 있다.