• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.11
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• pp.536-543
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• 2003

In this paper, we describe a unique self oscillating and mixing (SOM) down-converter design using a modified defected ground structure (DGS). The proposed SOM converter is consisted of self-oscillator, which can produce negative resistance and select resonance frequency, RF matching circuit, and IF low pass filter. As the advantage of this SOM converter can mix LO and RF signals as well as inducing LO signal with only one active device. it is designed as a simple structure and the low cost. Also, there is easy advantage to be applied in RFIC/MMIC technology because it offers excellent phase noise performance in spite of using micro-strip structure. The LO signal for the proposed SOM converter is designed at 1㎓ and RF frequency was chosen to be 800MHz. The achieved conversion loss and phase noise performances of the implemented SOM converter are 15㏈ and -95dBc/Hz at 100KHz offset frequency respectively. The equivalent circuit parameters for DGS are extracted by using a three dimensional EM simulator and simple circuit analysis method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.7A
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• pp.568-573
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• 2009

This paper presents a step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in O.13um CMOS standard process. In an effort to decrease system volume, this paper proposes the on chip compensation circuit using capacitor multiplier method. Capacitor multiplier method can minimize error amplifier's compensation capacitor size by 10%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87.2% for the output voltage of 1.2V (input voltage : 3.3V), maximum load current 500mA, and 25mA output ripple current. This voltage mode controled buck converter has 1MHz switching frequency.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.05a
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• pp.467-472
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• 2005

In this paper, design and control of the novel SEPIC-Flyback converter(SF converter) is developed as a possible converter for fuel cell system. This output characteristic of SF converter is similar to Buck-Boost converter in that it can step-up or step-down the voltage. With the small signal equivalent circuit modeling of SF converter, control-to-output transfer function is obtained. SF converter couples up the inductive type converter to capacitive type converter with one transformer, which has less ripple current than its respective one does. To verify the validity of the proposed converter, 500W, 100kHz converter is designed and tested. ZVS switching and active clamping are also tested in practice.

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.13-14
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• 2016

This paper has introduces a novel Integrated On-board Charger (IOBC) to reduce the size, weight and cost of power conversion stages in Electric Vehicles (EVs). The IOBC is composed of an OBC and a low voltage dc-dc converter (LDC). The IOBC includes a bidirectional ac-dc converter and a bidirectional full-bridge converter with an active clamp circuit. The LDC converter is a hybrid topology combining an active clamped full-bridge converter and a forward converter derived from the Weinburg converter topology. Unlike conventional OBC, the proposed IOBC is compact and the LDC converter of it can achieve a higher efficiency. In addition, the LDC converter of the proposed IOBC can achieve high step-down voltage conversion ratio, no circulating current, no reverse recovery current of the rectifier diodes and small ripple current of output inductor on the auxiliary battery. A 1kW hardware of the LDC converter is implemented to verify the performances of the proposed IOBC.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.5
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• pp.336-342
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• 2017

Recently, there has been an increasing need for underwater communication systems to monitor ocean environments and prevent marine disasters, as well as to secure ocean resources. Most underwater communication systems adopted acoustic communication with a consideration of attenuation, absorption, and scattering in conductive sea water, and developed fully digital modems based on processors. In this study, a digital up converter (DUC) and a digital down converter (DDC) was developed for an underwater basestation based on underwater acoustic communication systems. Because one of the most important issues in underwater acoustic communication systems is low power consumption due to environmental problems, this study developed a specific hardware module for DUC and DDC. It supported four links of underwater acoustic communication systems and converted the sampling rate and frequency. The systemwas designed and verified using Verilog-HDL in ModelSim environment with the test data generated from baseband layer parts for an underwater base station.

• Journal of the Korean Society of Industry Convergence
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• v.21 no.6
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• pp.265-271
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• 2018

DC-DC buck converter is a critical building block in the power management integrated circuit (PMIC) architecture for the portable devices such as cellular phone, personal digital assistance (PDA) because of its power efficiency over a wide range of conversion ratio. To ensure a safe operation, avoid unexpected damages and enhance the reliability of the converter, fully-integrated protection circuits such as over voltage protection (OVP), under voltage lock out (UVLO), startup, and thermal shutdown (TSD) blocks are designed. In this paper, these three fully-integrated protection circuit blocks are proposed for use in the DC-DC buck converter. The buck converter with proposed protection blocks is operated with a switching frequency of 1 MHz in continuous conduction mode (CCM). In order to verify the proposed scheme, the buck converter has been designed using a 180 nm CMOS technology. The UVLO circuit is designed to track the input voltage and turns on/off the buck converter when the input voltage is higher/lower than 2.6 V, respectively. The OVP circuit blocks the buck converter's operation when the input voltage is over 3.3 V, thereby preventing the destruction of the devices inside the controller IC. The TSD circuit shuts down the converter's operation when the temperature is over $85^{\circ}C$. In order to verify the proposed scheme, these protection circuits were firstly verified through the simulation in SPICE. The proposed protection circuits were then fabricated and the measured results showed a good matching with the simulation results.

• Journal of Electrical Engineering and Technology
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• v.1 no.3
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• pp.343-350
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• 2006

This paper introduces a new high efficient bi-directional, non-isolated DC/DC converter. Through variations of the topology of the conventional Cuk converter, an optimum bi-directional DC/DC converter is proposed. Voltage and current in the proposed DC/DC converter are continuous. Furthermore, the efficiency in both step-up and step-down mode is improved over that of the conventional bi-directional converter. To prove the validation for the proposed converter, simulations and experiments are executed with a 300W bi-directional converter.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.2 s.93
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• pp.189-193
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• 2005

In this paper, we propose a direct conversion double-balanced down-converter fer MB-OFDM W system, which is implemented using $0.18\;{\mu}m$ CMOS technology and its measurement results are shown. The proposed down-converter adopts a resistive current-source instead of general transconductance stage using MOS transistor to achieve wideband characteristics over RF input frequency band $3\~5\;GHz$ with good gain flatness. The measured conversion gain is more than +3 dB, and gain flatness is less than 3 dB for three UWB channels. The dc consumption of this work is only 0.89 mA from 1.8 V power supply, leading to the low-power W application.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.10 no.3
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• pp.43-50
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• 2010

DDC(Digital Down Converter) is a conversion technology to decimate to a lower sampling rate and DDC for the future development of communications technology has the necessary skills. So, it has been recognized in the wireless and the SDR(Software Defined Radio) system as essential components. In addition, research is underway on spectrum sensing for efficient communications environment due to the shortage of frequency resources. In this paper, the DDC systems were analyzed for CIC(Cascaded Integrator Comb) Filter, WDF(Wave Digital Filter), SRC(Sample Rate Conversion) each module. Moreover, we proposed a linkage effectively between DDC system and Spectrum Sensing for improve the efficiency of use of frequency by computer simulations. The simulation results of the DDC system was applied to the spectrum sensing capabilities. Also, performance and complexity of the results were derived and proposed system was the result of the check.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.4
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• pp.322-329
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• 2012

This paper proposes a non-isolated bidirectional soft-switching converter with high voltage for high step-up/down and high power applications. Compared to the conventional boost converter the proposed converter can achieve approximately doubled voltage gain using the same duty cycle. The voltage ratings of the switch and diode are reduced to half, which result in the use of devices with lower $R_{DS(ON)}$ and on drop leading to reduced conduction losses. Also, voltage ratings of the passive components are reduced, and therefore the total energy volume is reduced to half. Further, the switch is turned on with ZVS in the CCM operation which results in negligible surge caused leading to reduced switching losses. The validity of the proposed converter is proved through a 10kW prototype.