• 대한조선학회논문집
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• 제37권4호
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• pp.92-105
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• 2000

세장한 선박 판부재를 대상으로 가장 중요한 하중인 종방향 면내하중을 작용시키면서 이중판의 폭, 길이, 두께 및 주판(main plate) 부식 영향 등의 각종 파라메타 영향에 따른 이중판의 정적 강도평가를 주판의 접촉효과를 고려한 탄소성 대변형 비선형 시리즈 구조해석을 수행하였으며 이들 해석 결과로부터 각 파라메타의 변화에 따른 강성과 강도 특성을 분석하였다. 또한 이중판의 보강 효과가 최소한 새판으로 치환 보수한 평판 강도 수준으로 설계되어야 하므로 이를 손쉽게 파악할 수 있게 이중판으로 보강된 판부재를 등가 평판 두께로 환산할 수 있는 간이 평가식을 개발하였다. 이 개발식을 이용하여 각 이중판 설계의 영향인자 변화에 따른 등가 평판두께의 증감 정도를 파악하고 이로부터 적어도 새판으로 보수한 평판강도에 달할 수 있게 길이방향 일축 면내 압축하중을 받는 세장한 이중판의 설계지침을 제시하였다. 마지막으로, 개발된 등가 평판 도출식은 고정밀 좌굴강도 평가식과 서로 일정한 상관관계가 있음을 확인하고 관계식을 정립하였다. 이 관계식을 각 경우별로 축적하여 앞으로 일일이 구조해석을 수행하지 않고도 설계된 이중판 강도를 등가 평판두께로 제시할 수 있는 간이 추정식의 개발에 이용될 수 있을 것으로 사료된다.

• 산업기술연구
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• 제28권A호
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• pp.177-184
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• 2008

A low loss frequency doubler operated on low power for the RFID harmonic tags is presented. Using the excellent nonlinear characteristics of the Schottky barrier diode and proper matching networks between the diode and ports, the low conversion loss of the harmonic tag is accomplished. This doubler could be used to increase the detectable distance of the conventional RFID system adopted harmonic tags.

• Journal of Information Display
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• 제9권2호
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• pp.9-13
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• 2008

A novel push-pull voltage converter structure, using a switched capacitor type voltage doubler, is proposed. The circuit is constructed with a two-stage push-pull voltage doubler that has a stable operation with small output ripple. The two-stage voltage doubler creates the output voltage 4Vdd. The high clock signal is cross-coupled to the input of the second stage with the opposite phase to reduce two switching transistors and capacitors. Simulation results verify that even with a reduced number of transistor and capacitor, there is no circuit performance loss. Adding one capacitor and two switching transistors the circuit can be changed to eight times of Vdd maker.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.169-172
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• 2004

This paper presents the Asymmetric Half-Bridge converter using current-doubler rectifier. Resonant conditions of the asymmetrical soft switching Half-Bridge converter is analyzed. Current-doubler converter has small voltage and current ripple. The comparison of topology compared to the secondary rectification for center-tap type and current-doubler type are discussed. Experimental result are obtained on a 5V, 20A DC/DC Half-Bridge converter MOSFET based prototype for the 100W.

• 대한조선학회논문집
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• 제55권6호
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• pp.521-526
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• 2018

The doubler plate design system for the reinforcement of the ship plate members was developed considering various loads that subjected to the in-plane biaxial load, the in-plane shear load and out-of-plane load. The author summarized the accuracy of the development formula and equations through the equivalent plate thickness concept and finally introduced the new design system of doubler plate reinforcement. Through this study, it can be considered as an initial design guideline based on ship doubler plate reinforcement strength at areas without repeated load, or an initial structure analysis model for final structural design.

• Journal of Power Electronics
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• 제15권3호
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• pp.587-601
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• 2015

A high step-up dc-dc converter is proposed for photovoltaic power systems in this paper. The proposed converter consists of an input current doubler, a symmetrical switched-capacitor doubler and an active-clamp circuit. The input current doubler minimizes the input current ripple. The symmetrical switched-capacitor doubler is composed of two symmetrical quasi-resonant switched-capacitor circuits, which share the leakage inductance of the transformer as a resonant inductor. The rectifier diodes (switched-capacitor circuit) are turned off at the zero current switching (ZCS) condition, so that the reverse-recovery problem of the diodes is removed. In addition, the symmetrical structure results in an output voltage ripple reduction because the voltage ripples of the charge/pump capacitors cancel each other out. Meanwhile, the voltage stress of the rectifier diodes is clamped at half of the output voltage. In addition, the active-clamp circuit clamps the voltage surges of the switches and recycles the energy of the transformer leakage inductance. Furthermore, pulse-width modulation plus phase angle shift (PPAS) is employed to control the output voltage. The operation principle of the converter is analyzed and experimental results obtained from a 400W prototype are presented to validate the performance of the proposed converter.

• 한국국방경영분석학회지
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• 제36권1호
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• pp.91-102
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• 2010

보강재 수리는 항공무기체계 구조물에서 발생하는 각종 균열결함을 수리하기 위한 수리기법 중의 하나이다. 최근 들어 일부 장기운영 항공기에 대한 균열수리 소요는 증가추세에 있으나, 수리기법에 대한 군내에서의 연구는 미비한 실정이다. 본 연구는 보강재 수리방법에 따른 균열수리효과 검증을 목적으로 수행되었다. 특히 수리효과에 직접적으로 영향을 미치는 리벳 배열과 응력집중과의 상관관계를 고찰하였다. 상용 유한요소해석 프로그램을 사용하여 수리방법에 따른 응력의 변화량을 정량적으로 산출하였다. 연구결과 수리강도에 가장 크게 영향을 미치는 요소는 피치와 줄 수임을 확인하였다. 또한 본 연구를 통해 보강재 크기별 최적으로 리벳 배열 방법을 제시할 수 있었다.

• Journal of electromagnetic engineering and science
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• 제4권2호
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• pp.87-92
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• 2004

A millimeter-wave distributed frequency doubler has been designed with distributed block and frequency tunable output reflectors. The simulated conversion loss of 9.5 ㏈ to 7.7 ㏈ from 54.6 ㎓ to 62.4 ㎓ output frequencies is achieved with fundamental and third harmonic signal rejections of more than 10 ㏈c. The fabricated chip has the size of 1.2 mm${\times}$1.0 mm. Some measured results of frequency and bias dependent characteristics are presented for the fabricated PHEMT MMIC frequency doubler. The designed doubler has two transistors, and if one of the transistors fails the doubler unit still operates with reduced gain. The failure effect of the PHEMT has been simulated, and compared to the measured data of which one PHEMT is not operating properly.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권4호
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• pp.192-197
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• 2009

This paper presents the design and measurement of a 2.4/5.2-GHz dual band VCO with a balanced frequency doubler in $0.18\;{\mu}m$ CMOS process. The topology of a 2.4 GHz VCO is a cross-coupled VCO with a LC tank and the frequency of the VCO is doubled by a frequency balanced doubler for a 5.2 GHz VCO. The gate bias matching network for class B operation in the balanced doubler is adopted to obtain as much power at 2nd harmonic output as possible. The average output powers of the 2.4 GHz and 5.2 GHz VCOs are -12 dBm and -13 dBm, respectively, the doubled VCO has fundamental harmonic suppression of -25 dB. The measured phase noises at 5 MHz frequency offset are -123 dBc /Hz from 2.6 GHz and -118 dBc /Hz from 5.1 GHz. The total size of the dual band VCO is $1.0\;mm{\times}0.9\;mm$ including pads.

• 전력전자학회논문지
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• 제19권5호
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• pp.440-449
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• 2014

This study proposes an LLC series resonant converter with a current doubler using a coupled inductor as a rectification circuit for the secondary side. The current doubler circuit is generally used for a high-voltage input and low-voltage output circuit to obtain high efficiency with small transformer turn ratio. However, an inductive circuit is not generally used in the secondary side of an LLC series resonant converter. If inductive components exist on the secondary side, the resonant characteristics are changed through the secondary inductive circuit. Mathematical analysis shows that the secondary-side current doubler with coupled inductor is not affected by the resonant characteristic of the primary LLC if leakage inductance occurs in the coupled inductor. Results of the analysis are proven by simulation; an experiment is also conducted for the proposed circuit.