• 제목/요약/키워드: Doubler

검색결과 207건 처리시간 0.034초

Linear Tapered Slot Rectifying Antenna for Portable UHF-Band RFID System (휴대용 UHF대역 RFID 시스템을 위한 선형 테이퍼드 슬롯 정류 안테나)

  • Pyo, Seongmin
    • Journal of IKEEE
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    • 제24권1호
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    • pp.368-371
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    • 2020
  • In this paper, we propose a linear tapered slot rectifying antenna for a portable UHF-band RFID system. Since the proposed rectifying antenna does not use a dielectric substrate, the planar antenna is implemented with a thin metal thickness. The rectifier circuit converts input RF power into output DC voltage using a voltage doubler circuit based on two anti-parallel schottky diodes. The rectifying antenna is integrated by the voltage doubler circuit into a linear tapered slot antenna. For conjugate impedance matching of the rectifying circuit and the linear tapered slot antenna, the source-pull method was utilized by adjusting the angle of the tapered slot and the length of the antenna feed line. The proposed antenna prototype has been verified with the electrical and radiation characteristics through RF-DC conversion and far-field radiation test in open space measurement environment. Finally, the proposed antenna is realized to 0.23-wavelength (75 mm) and 0.18-wavelength (60 mm) at 915 MHz center frequency.

Air-Conditioner Power Source Device to Meet the Harmonic Guide Lines (고조파 규제값에 적합한 에어컨 전원장치)

  • Mun, Sang-Pil;Park, Yeong-Jo;Seo, Gi-Yeong
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • 제51권10호
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    • pp.581-586
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    • 2002
  • To improve the current waveform of diode rectifiers, we propose a new operating principle for the voltage-doubler diode rectifiers. In the conventional voltage-doubler rectifier circuit, relatively large capacitors are used to boost the output voltage, while the proposed circuit uses smaller ones and a small reactor not to boost the output voltage but improve the input current waveform. A circuit design method is shown by experimentation and confirmed simulation. The experimental results of the proposed diode rectifier satisfies the harmonic guide lines. A high input power factor of 97(%) and an efficiency of 98[%] are also obtained. The new rectifier with no controlled switches meet the harmonic guide lines, resulting in a simple, reliable and low-cost at-to dc converters in comparison with the boost-type current-improving circuits. This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage. And this paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit is constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is, it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduction and the power factor improvement. Half pulse-width modulated (HPWM) inverter was explained compared with conventional pulse width modulated(PWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

Thermal Analysis of Satellite Panel Using Carbon Composites (탄소복합재를 이용한 위성 패널의 열해석)

  • Jun, Hyoung-Yoll;Kim, Jung-Hoon;Park, Jong-Seok;Park, Kun-Joo
    • Aerospace Engineering and Technology
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    • 제10권2호
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    • pp.114-120
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    • 2011
  • Thermal control of satellite is mainly based on passive ways, such as the radiator made of aluminum honeycomb core with aluminum skins and OSR (Optical Solar Reflector). Additionally, for the thermal control of high dissipation unit, the aluminum doubler and heat pipe are utilized. Recently, efforts to find advanced thermal materials have been carried out to enhance heat rejection capability without increasing satellite size, weight and cost. This paper handles the carbon composites have high thermal conductivity with light weigh and have been considered as future thermal control materials to replace aluminum based radiator and doubler. Thermal analysis of satellite panel using APG(Annealed Pyrolytic Graphite) and carbon-carbon composites were performed and temperature contours were compared with the conventional thermal control methods.

Three-Phase ZVS DC-DC Converter with Low Transformer Turn Ratio for High Step-up and High Power Applications (낮은 변압기 턴비를 갖는 고승압.대전력용 3상 ZVS DC-DC컨버터)

  • Kim, Joon-Geun;Park, Chan-Soo;Choi, Se-Wan;Park, Ga-Woo
    • The Transactions of the Korean Institute of Power Electronics
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    • 제16권3호
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    • pp.242-249
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    • 2011
  • The proposed converter has easy device selection for high step-up and high power applications since boost half bridge and voltage doubler cells are connected, respectively, in parallel and series in order to increase output power and voltage. Especially, optimized design of high frequency transformers is possible owing to reduced turn ratio and eliminated dc offset, and distributed power through three cores is beneficial to low profile and thermal distribution. The proposed converter does not necessitate start-up circuit and additional clamp circuit due to the use of whole duty range between 0 and 1 and is suitable for applications with wide input voltage range. Also, high efficiency can be achieved since ZVS turn on of switches are achieved in wide duty cycle range and ZCS turn on and off of diodes are achieved. The proposed converter was validated through 5 kW prototype.

60 GHz CMOS SoC for Millimeter Wave WPAN Applications (차세대 밀리미터파 대역 WPAN용 60 GHz CMOS SoC)

  • Lee, Jae-Jin;Jung, Dong-Yun;Oh, Inn-Yeal;Park, Chul-Soon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • 제21권6호
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    • pp.670-680
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    • 2010
  • A low power single-chip CMOS receiver for 60 GHz mobile application are proposed in this paper. The single-chip receiver consists of a 4-stage current re-use LNA with under 4 dB NF, Cgs compensating resistive mixer with -9.4 dB conversion gain, Ka-band low phase noise VCO with -113 dBc/Hz phase noise at 1 MHz offset from 26.89 GHz, high-suppression frequency doubler with -0.45 dB conversion gain, and 2-stage current re-use drive amplifier. The size of the fabricated receiver using a standard 0.13 ${\mu}m$ CMOS technology is 2.67 mm$\times$0.75 mm including probing pads. An RF bandwidth is 6.2 GHz, from 55 to 61.2 GHz and an LO tuning range is 7.14 GHz, from 48.45 GHz to 55.59 GHz. The If bandwidth is 5.25 GHz(4.75~10 GHz) The conversion gain and input P1 dB are -9.5 dB and -12.5 dBm, respectively, at RF frequency of 59 GHz. The proposed single-chip receiver describes very good noise performances and linearity with very low DC power consumption of only 21.9 mW.

Forward-Flyback DC-DC Converter for the Low Voltage and High Current Applications (저전압 대전류용 Forward-Flyback DC-DC 컨버터)

  • Hwang, Sun-Min;Park, Sung-Kyu;Cho, In-Ho;Ahn, Tae-Young
    • Proceedings of the KIEE Conference
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    • 대한전기학회 2002년도 하계학술대회 논문집 B
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    • pp.980-982
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    • 2002
  • In this paper, we report the experimental results of the Forward-flyback DC-DC converter with current doubler and synchronous rectifier. The experimental converter, that has a output voltage 1.8V, output current 25A, maximum power of 45W, switching frequency of 290kHz and input voltage range of 36-75V, has been successfully implemented. As a result, in the entire voltage range the measured full load efficiency was above 82%, and the output voltage was regulated at 1.8V within ${\pm}$3% tolerance.

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A Study on the Design and Implementation of Ku-Band Frequency Synthesizer by using PLL (PLL을 이용한 Ku-Band 주파수 합성기 설계 및 제작에 관한 연구)

  • 이일규;민경일;안동식;오승협
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제19권10호
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    • pp.1872-1879
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    • 1994
  • The design and implementation of Ku-Band frequency synthesizer was accomplished by the use of PLL and frquency multiple method. Design procedure and operation characteristics of PLL circuit were analyzed on the basis of control theory to synthesize about 1 GHz frequency which should be stable. By connecting frequency doubler and frequency eighth multiplier to the designed PLL circuit in series, Ku-Band frequency was synthesized. The validity of design method of Ku-Band frequency synthesizer was verified through experimental results.

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10Gbps Driver Design with Pre-Emphasis Functionality (Pre-Emphasis 기능을 갖는 10Gbps 드라이버의 설계)

  • Lee, Woo-Kwan;Rim, Woo-Jin;Kim, Soo-Won
    • Proceedings of the IEEK Conference
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.691-694
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    • 2005
  • This paper proposed 10Gbps driver with pre-emphasis for high speed transmitter. the proposed driver increase bandwidth using Ft doubler method and design driver block and pre-emphasis block in together. Pre-emphasis functionality confirmed to control VDS of current source o driver, not to control slew rate of termination resistor. The proposed driver is designed in a 1.5V/0.13um 1-poly, 5-metal CMOS mixed-signal process.

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Analysis of an Active Clamp Forward Converter with Current-Doubler Rectifier for Wide Range Zero Voltage Switching (전류증배 정류회로를 사용한 능동 클램프 포워드 컨버터의 개선된 영전압 스위칭에 대한 분석)

  • Kim, D.H.;Jang, Paul;Cho, B.H.
    • Proceedings of the KIPE Conference
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    • 전력전자학회 2013년도 추계학술대회 논문집
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    • pp.137-138
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    • 2013
  • 능동 클램프 포워드 컨버터의 2차단에 전류 증배 정류회로를 사용할 경우 2차단에서의 도통 손실을 줄일 수 있다. 뿐만 아니라 상대적으로 큰 자화 인덕턴스와 작은 누설 인덕턴스를 이용하여 영전압 스위칭을 달성할 수 있으므로 회로 전체 동작 측면에서 바람직하다. 본 논문에서는 제안된 회로의 동작 설명과 함께 영전압 스위칭을 위한 조건을 다루었고 240W급 (12-V/20-A) 프로토타입 회로를 통해 분석 결과의 타당성을 검증하였다.

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A Study on the Power Factor Improvement of Single-Phase Bridgeless Voltage Doubler Converter (단상 브리지리스 배전압 변환기의 역률 개선에 관한 연구)

  • Koo, Do-Yeon;Kim, Dong-Wook;Lim, Seung-Beom;Hong, Soon-Chan
    • Proceedings of the KIPE Conference
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    • 전력전자학회 2011년도 추계학술대회
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    • pp.169-170
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    • 2011
  • PFC(Power Factor Correction) converters are commonly designed for CCM(Continuous Conduction Mode). However, DCM(Discontinuous Conduction Mode) appears in the input current near the ZCP(Zero Crossing Point) at light loads, resulting in input current distortion. It is caused by inaccurate average current values obtained in DCM. This paper studies a simple digital control scheme that can be operated in both CCM and DCM with minimal changes to the CCM average current control structure.

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