• Structural Engineering and Mechanics
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• 제64권2호
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• pp.233-241
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• 2017

Earlier numerous studies have been done on implementation of Tuned Liquid Damper (TLD) for structural vibration control by many researchers. As per current review there is no significant study on a sloped bottom TLD. TLD's are passive devices. A TLD is a tank rigidly attached to the structure and filled partially by liquid. When fundamental linear sloshing frequency is tuned to structure's natural frequency large sloshing amplitude is expected. In this study set of experiments are conducted on flat bottom and sloped bottom TLD at beach slope $20^{\circ}$, $30^{\circ}$ and $45^{\circ}$, for different types of structures, mass ratio, and depth ratio to investigate the overall effectiveness of TLD and specific effect of TLD parameters on structural response. This experimental study shows that a properly designed TLD reduces structural response. It is also observed that effectiveness of TLD increases with increase in mass ratio. In this experimental study an effectiveness of sloped bottom TLD with beach slope $30^{\circ}$ is investigated and compared with that of flat bottom TLD in reducing the structural response. It is observed from this study that efficiency of sloped bottom TLD in reducing the response of structure is more as compared to that of flat bottom TLD. It is shown that there is good agreement between numerical simulation of flat bottom and sloped bottom TLD and its experimental results. Also an attempt has been made to investigate the effectiveness of sloped bottom TLD with beach slope $20^{\circ}$ and $45^{\circ}$.

• Composites Research
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• 제30권1호
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• pp.1-6
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• 2017

Epoxy resin (EP) is one of the most famous thermoset materials. In general, because EP has three-dimensional random network, it possesses thermal properties like a typical heat insulator. Recently, there has been increasing interest in controlling the network structure for making new functionality from EP. Indeed, the new modified EP represented as liquid crystalline epoxy (LCE) is spotlighted as an enabling technology for producing novel functionalities, which cannot be obtained from the conventional EPs, by replacing the random network structure to oriented one. In this paper, we review current progress in the field of LCEs and their application for the highly thermal conductive composite materials.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 한국해양정보통신학회 2007년도 추계종합학술대회
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• pp.187-191
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• 2007

This paper describes a 3.3V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method with monotonicity, glitch energy. The output stage utilizes here implements a return-to-zero circuit to obtain the dynamic performance. Most of D/A converters in decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. the designed D/A converter using the CMOS n-well $0.35{\mu}m$ process0. The experimental data shows that the rise/fall time, settling time, and INL/DNL are 1.90ns/2.0ns, 12.79ns, and a less than ${\pm}2.5/{\pm}0.7$ LSB, respectively. The power dissipation of the D/A converter with a single power supply of 3.3V is about 250mW.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 한국표면공학회 2017년도 춘계학술대회 논문집
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• pp.107-107
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• 2017

전자제품의 성능이 향상됨에 따라서 전자제품에 사용되는 부품의 고집적화가 필연적으로 요구되고 있으며, 고집적화 된 전자제품의 방열(heat dissipation)에 관한 문제점이 대두되고 있다. 방열은 전자기기의 성능과 수명을 유지하는데 있어서 중요한 문제 중 하나로서 방열 효과를 높이기 위해 다양한 연구 개발이 진행 중이다. 방열에 사용되는 소재로는 Cu가 있으며, 저렴한 가격과 상대적으로 높은 방열 효율을 가지는 장점이 있다. Cu는 전기 도금 증착 방법을 사용하여왔으나, 전기도금 방식으로 증착된 Cu 방열판은 제품에 열이 축적될 경우 Cu와 substrate 사이의 residual stress로 인해 박리나 뒤틀림 현상 등이 발생하여 high power를 사용하는 device의 방열 소재로 사용하기에는 개선해야 할 문제점이 있다. 이러한 문제점을 극복하기 위한 방법으로 magnetron sputter 증착 방법이 있으며, magnetron sputter은 대면적화가 용이하고, 다양한 물질의 증착이 가능한 장점으로 인해 hard coating 또는 thin film 증착과 같은 공정에 사용되고 있다. 특히 증착된 film의 특성을 조절하기 위해서 magnetron sputter에 pulse 또는 ICP (inductively coupled plasma) assisted 등을 적용하여 plasma 특성을 조절하는 방법 등에 관한 연구가 보고되고 있다. 본 연구에서는 pulsed magnetron sputtering 방식을 이용하여 증착된 Cu film 특성 변화를 확인하였다. 다양한 pulsing frequency와 pulsing duty ratio 조건에서, Si substrate 위에 증착된 Cu film과의 residual stress 변화를 측정하였다. Pulse duty ratio가 90% 에서 60%로 감소함에 따라서 Cu film의 residual stress가 감소하였고, pulsing frequency가 증가함에 따라 Cu film의 residual stress가 감소하는 것을 확인하였다. 증착 조건에 따른 plasma의 특성 분석을 위하여 oscilloscope를 이용하여 voltage와 current를 측정하였고, Plasma Sampling Mass spectrometer 를 이용하여 ion energy의 변화를 측정하였다. 이를 통해 plasma 특성 변화가 증착된 Cu film에 미치는 영향과 residual stress의 변화에 대한 연관성에 대하여 확인할 수 있었다.

• International Journal of Fluid Machinery and Systems
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• 제2권4호
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• pp.269-277
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• 2009

The current paper focuses on the analysis of transient cavitating flow in pressurised polyethylene pipes, which are characterized by viscoelastic rheological behaviour. A hydraulic transient solver that describes fluid transients in plastic pipes has been developed. This solver incorporates the description of dynamic effects related to the energy dissipation (unsteady friction), the rheological mechanical behaviour of the viscoelastic pipe and the cavitating pipe flow. The Discrete Vapour Cavity Model (DVCM) and the Discrete Gas Cavity Model (DGCM) have been used to describe transient cavitating flow. Such models assume that discrete air cavities are formed in fixed sections of the pipeline and consider a constant wave speed in pipe reaches between these cavities. The cavity dimension (and pressure) is allowed to grow and collapse according to the mass conservation principle. An extensive experimental programme has been carried out in an experimental set-up composed of high-density polyethylene (HDPE) pipes, assembled at Instituto Superior T$\acute{e}$cnico of Lisbon, Portugal. The experimental facility is composed of a single pipeline with a total length of 203 m and inner diameter of 44 mm. The creep function of HDPE pipes was determined by using an inverse model based on transient pressure data collected during experimental runs without cavitating flow. Transient tests were carried out by the fast closure of the ball valves located at downstream end of the pipeline for the non-cavitating flow and at upstream for the cavitating flow. Once the rheological behaviour of HDPE pipes were known, computational simulations have been run in order to describe the hydraulic behaviour of the system for the cavitating pipe flow. The calibrated transient solver is capable of accurately describing the attenuation, dispersion and shape of observed transient pressures. The effects related to the viscoelasticity of HDPE pipes and to the occurrence of vapour pressures during the transient event are discussed.

• Journal of Digital Contents Society
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• 제16권1호
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• pp.97-104
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• 2015

The conventional 1 Hall sensor-type water gauge has some defects that it can not detect counterflow and low-speed flow of water, and it also generates power consumption during even sleep mode. In this paper, a low-power consumption wireless digital remote water gauge with a counterflow detection capability is proposed. The proposed water gauge detects the direction and amount of water flow by using the three Hall sensors placed at $120^{\circ}$ intervals with 8-year national standard life durability. The water gauge with three Hall sensors works without error regardless of water speed does not generate power dissipation during sleep mode by presented reading algorithm for bew water gauge. The proposed water gauge is designed to send its ID, current time and counting value to repeater or central control center with specified frequency by RF Module.

• Current Optics and Photonics
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• 제1권2호
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• pp.143-149
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• 2017

LED arrays with pixel numbers of $3{\times}3$, $4{\times}4$, and $5{\times}5$ have been studied in this paper in order to enhance the optical output power and decrease heat dissipation of an AlGaInP-based light emitting diode display device (pixel size of $280{\times}280{\mu}m$) fabricated by micro-opto-electro-mechanical systems. Simulation results showed that the thermal resistances of the $3{\times}3$, $4{\times}4$, $5{\times}5$ arrays were $52^{\circ}C/W$, $69.7^{\circ}C/W$, and $84.3^{\circ}C/W$. The junction temperature was calculated by the peak wavelength shift method, which showed that the maximum value appears at the center pixel due to thermal crosstalk from neighboring pixels. The central temperature would be minimized with $40{\mu}m$ pixel pitch and $150{\mu}m$ substrate thickness as calculated by thermal modeling using finite element analysis. The modeling can be used to optimize parameters of highly integrated AlGaInP-based LED arrays fabricated by micro-opto-electro-mechanical systems technology.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제24권9호
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• pp.873-882
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• 2013

The effective way of estimation and analysis of EMI(Electromagnetic Interference) in Wireless Power Transfer System operating at 13.56 MHz is proposed. In this paper methodology of driving magnetic field strength and electric loop current of two antennas which are in free space and on PEC plane using image theory and duality is proposed. Perfect electric conductor(PEC) is planar, infinite in extent, and perfectly conducting plane. And we will refer it as PEC plane. A equivalent circuit model is used to analyze. Using this theoretical analysis, we can derive maximum magnetic field strength of the far-field region numerically using measured data of near-field maximum magnetic field strength. The experimental results using commercial numerical simulation tool are in agreement with the theoretical results. Also, using the derivation of maximum magnetic field strength in the far-field region, we can easily estimate the maximum allowable power dissipation that meets EMI regulations.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제38권4호
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• pp.251-265
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• 2001

As the device scaling proceeds, the operating voltage(VDD) of giga-bit DRAMs is expected to be reduced to 1.5V or down, fir improving the device reliability and reducing the power dissipation. Therefore the low-voltage circuit design techniques are required to implement giga-bit DRAMs. In this work, state-of-art low-voltage DRAM circuit techniques are reviewed, and four kinds of low-voltage circuit design techniques are newly proposed for giga-bit DRAMs. Measurement results of test chips and SPICE simulation results are presented for the newly proposed circuit design techniques, which include a hierarchical negative-voltage word-line driver with reduced subthreshold leakage current, a two-phase VBB(Back-Bias Voltage) generator, a two-phase VPP(Boosted Voltage) generator and a bandgap reference voltage generator.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제48권2호
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• pp.20-27
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• 2011

A CMOS Image Sensor(CIS) mounted on mobile appliances always needs a low power consumption because of the battery life cycle. In this paper, we propose novel power reduction techniques such as a data flip-flop circuit with leakage current elimination, a low power single slope A/D converter with a novel comparator, and etc. Based on 0.13um CMOS process, the chip satisfies QVGA resolution($320{\times}240$ pixels) whose pitch is 2.25um and whose structure is 4-Tr active pixel sensor. From the experimental results, the ADC in the middle of CIS has a 10-b resolution, the operating speed of CIS is 16 frame/s, and the power dissipation is 25mW at 3.3V(Analog)/1.8V(Digital) power supply. When we compare the proposed CIS with conventional ones, the power consumption is reduced approximately by 22% in sleep mode, 20% in operating mode.