• 제목/요약/키워드: Digitally synthesized impulse generator

검색결과 2건 처리시간 0.019초

위치 기반 시스템을 위한 CMOS IR-UWB RFIC (A CMOS IR-UWB RFIC for Location Based Systems)

  • 이중무;박명철;어윤성
    • 전자공학회논문지
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    • 제52권12호
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    • pp.67-73
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    • 2015
  • 본 논문에서는 근거리 위치 기반 시스템을 위한 3 - 5 GHz IR-UWB(impulse radio-ultra wide band) RFIC를 제안한다. 수신기의 구조는 에너지 검출 방식으로 설계되었고, 고속 sampling을 하기 위해서 4 bit ADC 와 DLL(delay locked loop) 을 이용하여 equivalent-time sampling 기술을 사용하도록 설계되었다. 송신기는 저전력의 디지털 UWB impulse generator 를 설계하였다. 설계된 IR-UWB RFIC 는 CMOS $0.18{\mu}m$ 공정을 이용하여 제작되었다. 측정된 수신기의 감도는 -85.7 dBm 이며, 송신기와 수신기는 1.8 V 전원 전압에서 각각 32 mA 와 25.5 mA 의 전류를 소모한다.

A 3 ~ 5 GHz CMOS UWB Radar Chip for Surveillance and Biometric Applications

  • Lee, Seung-Jun;Ha, Jong-Ok;Jung, Seung-Hwan;Yoo, Hyun-Jin;Chun, Young-Hoon;Kim, Wan-Sik;Lee, Noh-Bok;Eo, Yun-Seong
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제11권4호
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    • pp.238-246
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    • 2011
  • A 3-5 GHz UWB radar chip in 0.13 ${\mu}m$ CMOS process is presented in this paper. The UWB radar transceiver for surveillance and biometric applications adopts the equivalent time sampling architecture and 4-channel time interleaved samplers to relax the impractical sampling frequency and enhance the overall scanning time. The RF front end (RFFE) includes the wideband LNA and 4-way RF power splitter, and the analog signal processing part consists of the high speed track & hold (T&H) / sample & hold (S&H) and integrator. The interleaved timing clocks are generated using a delay locked loop. The UWB transmitter employs the digitally synthesized topology. The measured NF of RFFE is 9.5 dB in 3-5 GHz. And DLL timing resolution is 50 ps. The measured spectrum of UWB transmitter shows the center frequency within 3-5 GHz satisfying the FCC spectrum mask. The power consumption of receiver and transmitter are 106.5 mW and 57 mW at 1.5 V supply, respectively.