• Title/Summary/Keyword: Digital-to-Analog-Converter

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Improved DC Offset Error Compensation Algorithm in Phase Locked Loop System

  • Park, Chang-Seok;Jung, Tae-Uk
    • Journal of Electrical Engineering and Technology
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    • v.11 no.6
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    • pp.1707-1713
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    • 2016
  • This paper proposes a dc error compensation algorithm using dq-synchronous coordinate transform digital phase-locked-loop in single-phase grid-connected converters. The dc errors are caused by analog to digital conversion and grid voltage during measurement. If the dc offset error is included in the phase-locked-loop system, it can cause distortion in the grid angle estimation with phase-locked-loop. Accordingly, recent study has dealt with the integral technique using the synchronous reference frame phase-locked-loop method. However, dynamic response is slow because it requires to monitor one period of grid voltage. In this paper, the dc offset error compensation algorithm of the improved response characteristic is proposed by using the synchronous reference frame phase-locked-loop. The simulation and the experimental results are presented to demonstrate the effectiveness of the proposed dc offset error compensation algorithm.

Analysis of the Linear Amplifier/ADC Interface in a Digital Microwave Receiver (디지털 마이크로파 수신기에서의 선형 증폭기와 ADC 접속 해석)

  • Lee, Min Hyouck;Kim, Sung Gon;Choi, Hee Joo;Byon, Kun Sik
    • Journal of Advanced Navigation Technology
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    • v.3 no.1
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    • pp.52-59
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    • 1999
  • Digital microwave wideband receiver including linear amplifier, analog-to-digital converter(ADC) and digital signal processor is able to analyze its performance using sensitivity and dynamic range of system. Determination of gain, third-order intermodulation products and ADC characteristics and design criteria for the linear amplifier chain is essential problem for sensitive and dynamic range. Also, if there are two signals with frequencies very close, digital signal processor must be able to separate the two signals. In this paper, we measured dynamic range as gain was changed and determined gain value for the proper sensitivity and dynamic range and high resolution spectrum estimation was used to separate two close signals.

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High-Speed Fault Current Detector for Superconducting Fault Current Limiter (초전도 한류기용 고속 고장전류 검출장치)

  • 이우영;박경엽;송기동;이병윤
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2002.02a
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    • pp.300-302
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    • 2002
  • In this paper the high-speed fault current detector for superconducting fault current limiter is described. Detecting and interrupting the fault currents as quickly as possible is required in order not to exceed the thermal capacity of superconducting fault current limiter. A detecting method of an instantaneous fault current magnitude is adopted in the equipment described in this paper and a current signal through an analog/digital(A/D) converter would be compared with the reference in the digital signal processor(DSP). Around 20ms has elapsed for detecting the fault current. It is necessary to establish the appropriate trade-off between the reliability and detection speed.

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A Single-Chip CMOS Digitally Synthesized 0-35 MHz Agile Function Generator

  • Meenakarn, C.;Thanachayanont, A.
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1984-1987
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    • 2002
  • This paper describes the design and implementation of a single-chip digitally synthesized 0-35MHz agile function generator. The chip comprises an integrated direct digital synthesizer (DDS) with a 10-bit on- chip digital-to-analog converter (DAC) using an n-well single-poly triple-metal 0.5-$\mu\textrm{m}$ CMOS technology. The main features of the chip include maximum clock frequency of 100 MHz at 3.3-V supply voltage, 32-bit frequency tuning word resolution, 12-bit phase tuning word resolution, and an on-chip 10-bit DAC. The chip provides sinusoidal, ramp, saw-tooth, and random waveforms with phase and frequency modulation, and power-down function. At 100-MHz clock frequency, the chip covers a bandwidth from dc to 35 MHz in 0.0233-Hz frequency steps with 190-ns frequency switching speed. The complete chip occupies 12-mm$^2$die area and dissipates 0.4 W at 100-MHz clock frequency.

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Microcomputer-based Data Acquisition System for the Measurements of Temperature and Weight in Food Processing (마이크로 컴퓨터를 이용한 식품가공(食品加工) 공정중(工程中)의 온도및 무게 측정용(測定用) Analog-digital 변환(變換)및 접속(接續) 시스템의 제작(製作))

  • Choi, Boo-Dol;Chun, Jae-Kun
    • Korean Journal of Food Science and Technology
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    • v.19 no.2
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    • pp.129-133
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    • 1987
  • To develop a microcomputer-based data acquisition system for measurement of variables such as temperature and weight in food process, a low-cost data acquisition system was developed using an Apple II microcomputer. The system consisted of a microcomputer, a temperature sensor made of pt-100, a strain gauge load cell for weighing, a preamplifier for signal conditionings and an interface device. Interface device was built with programmable interface chip MC 6821, tristate buffer 74244 and analog-to-digital converter ADC 0809. The analog signals of temperature and weight were serially acquisited upon the program. The BASIC language was used for operating the data acquisition and data handling programs. The system successfully measured the variables such as temperature and weight with various sampling intervals in food dehydration process.

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Fabrication and Characteristics of Hot-film Anemometer (열박막 풍속계의 제작 및 특성)

  • Kim, Hyung-Pyo;Cho, Chan-Seob
    • Journal of Sensor Science and Technology
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    • v.9 no.3
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    • pp.190-195
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    • 2000
  • The paper presents the constant temperature digital hot-film anemometer that measures easily a wind velocity at the indoor. The output is linearized using microprocessor and analog-to-digital converter, because the fourth root of the wind velocity is the output voltage of the sensor. The comparison result between fabricated and reference anemometer is less than ${\pm}2%$. In the range of air temperature of $23^{\circ}C{\sim}60^{\circ}C$, the error is about ${\pm}1%$ in wind velocity 10m/sec.

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A Design of CMOS ADC for Video Interface (비디오 신호 인터페이스를 위한 CMOS ADC의 설계)

  • 안승헌;권오준;임진업;최중호
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.975-978
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    • 2003
  • 본 논문에서는 비디오 신호 인터페이스를 위해 10비트 50MHz ADC 를 설계하였으며 DCL(digital-error correction logic)을 갖는 3-3-3-4 구조의 파이프라인 방식을 사용하였다. SHA(sample and hold amplifier)와 MDAC (multiplying digital-to-analog converter)에 쓰이는 증폭기는 높은 이득을 갖도록 gain-boosting 기법을 적용하였으며, 전력소모와 면적을 줄이기 위해 capacitor scaling 기법을 적용하였다. 본 ADC 는 0.35 μm double-poly four-metal n-well CMOS 공정으로 설계 및 제작하였으며, 전체 회로는 3.3V 단일 전원 전압에서 동작하도록 설계하였다. 측정 결과 5MHz 의 입력을 인가하였을 때 SNDR 은 56.7dB, 전체 전력 소모는 112mW 이며, 입출력 단의 패드를 포함한 전체 칩 면적은 2.6mm×2.6mm이다.

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A study on the Development of an electronic control unit using digital sensors for propulsion systems (디지털센서를 이용한 추진 시스템 전자 제어장치 연구)

  • Son, Jong-Dae;Kim, Jung-Hoe;Lee, Jae-Yun;Kim, Tae-Wan;Yoon, Soo-Hee;Lee, Yong-Hwan;Kwak, Geunn-Yeong;Chung, Soon-Bae
    • Proceedings of the Korean Society of Propulsion Engineers Conference
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    • 2010.11a
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    • pp.167-169
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    • 2010
  • Electronic control units for propulsion systems are devices which compute control algorithm by processing the systems' internal sensor signals. Due to the effect of transmission between sensors and a control unit, previous analog systems have drawbacks of signal attenuation and susceptibility to noises. However, a digital sensor can be less influenced by the electrical cable line as it includes sensor, AMP, and AD converter in one module. In addition, it can reduce the process time for control algorithm because extra S/W filtering process is not needed. The current study shows how to process signals for an electronic control unit using digital sensors.

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Performance Analysis and Design of Fir ADM Digital Filters (FIR ADM 디지털 필터의 성능 해석 및 설계)

  • 선우종성;은종관
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.19 no.4
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    • pp.38-48
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    • 1982
  • Performance and realization of finite impulse response (FIR) digital filters that use an adaptive delta modulator (ADM) as an analog/digital converter have been studied. This filter requires no multiplication and offers many advantages over conventional PCM filters in low power consumption, small size, and cost effectiveness. Analytical formulas have been derived for the expected mean-squared errors and also for the word length necessary to achieve the desired performance. Computer simultation has been done to optimize the parameter values and to verify the results of performance analysis. In addition, design of FIR ADM digital filters for processing single and multi-channel signals has been considered.

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A Study of the Exclusive Embedded A/D Converter Using the Microprocessor and the Noise Decrease for the Magnetic Camera (마이크로프로세서를 이용한 자기카메라 전용 임베디드형 AD 변환기 및 잡음 감소에 관한 연구)

  • Lee, Jin-Yi;Hwang, Ji-Seong;Song, Ha-Ryong
    • Journal of the Korean Society for Nondestructive Testing
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    • v.26 no.2
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    • pp.99-107
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    • 2006
  • Magnetic nondestructive testing is very useful far detecting a crack on the surface or near of the surface of the ferromagnetic materials. The distribution of the magnetic flux leakage (DMFL) on a specimen has to be obtained quantitatively to evaluate the crack. The magnetic camera is proposed to obtain the DMFL at the large lift-off. The magnetic camera consists of a magnetic source, magnetic lens, analog to digital converters (ADCs), interface, and computer. The magnetic leakage fields or the distorted magnetic fields from the object, which are concentrated on the magnetic lens, are converted to analog electrical signals tv arrayed small magnetic sensors. These analog signals are converted to digital signals by the ADCs, and are stored, imaged, and processed by the interface and computer. However the magnetic camera has limitations with respect to converting and switching speed, full range and resolution, direct memory access (DMA), temporary storage speed and volume because common ADCs were used. Improved techniques, such as those that introduce the operational amplifier (OP-Amp), amplify the signal, reduce the connection line, and use the low pass filter (LPF) to increase the signal to noise ratio are necessary. This paper proposes the exclusive embedded ADC including OP-Amp, LPF, microprocessor and DMA circuit for the magnetic camera to satisfy the conditions mentioned above.