• The Transactions of the Korean Institute of Electrical Engineers P
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• v.51 no.4
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• pp.175-185
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• 2002

In this paper, a new fully digital current control method of UPS inverter, which is based on an internal model control, is proposed. In the proposed control system, overshoots and oscillations due to the computation time-delay are compensated by explicit incorporation of the time-delay in the current control loop transfer function. The internal model controller is adopted to a second order deadbeat reference-to-output response which means that its response reaches the reference in two sampling time including computational time-delays. That is, the average current of filter capacitor is been exactly equal to the reference current with a time lag of two sampling intervals. Therefore, this method has an essentially overshoot free reference-to-output response with a minimum possible rise time. The effectiveness of the proposed control system has been verified by the simulation and experimental respectively. From the simulation and experimental results, the proposed system is achieved the robust characteristics to the calculation time delay and parameter variation as well as very fast dynamic performance, thus it can be effectively applied to the power supply for the critical load.

• Proceedings of the KIEE Conference
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• 2003.07a
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• pp.564-566
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• 2003

전력 계통에서 안정한 전력을 공급하는 것은 매우 중요하다. 전력 계통의 오류는 전압 및 주파수를 감시함으로써 검출 가능하다. 본 논문에서는 디지털 위상 고정 루프를 이용한 전력 계통의 주파수 측정 장치를 제안하고 이를 구현한 결과를 제시하고자 한다. 제안한 주파수 측정 장치는 위상 고정 루프의 기본요소로 구성된다. 위상분별기는 배타적 논리연산을 통해 위상오차를 검출하고 위상의 앞섬 및 뒤짐의 검출이 가능하도록 설계하였으며, 전력 계통의 주파수 동특성을 고려해서 3차의 루프 필터를 설계하였다. DCO는 출력 주파수의 분해능을 고려하여 입력 신호를 정확하게 추정할 수 있도록 설계하였다. 제안한 주파수 측정 장치의 성능을 검증하기 위하여 모의실험을 통해 주파수 변동량의 측정 범위 및 정확도를 검토하였으며, FPGA와 CPU를 포함하는 하드웨어를 구현하였다. FPGA에는 Verilog HDL로 디지털 위상 고정 루프의 위상분별기와 DCO를 구현하였으며 루프필터는 소프트웨어로 구현하였다. 제안한 디지털 위상 고정 루프의 성능 검증을 위해 정밀한 함수 발생기의 출력을 인가한 후 출력 주파수를 측정한 결과 및 전력 계통에 대한 실험 결과를 제시하였다.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.4
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• pp.258-264
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• 2015

The first 77 GHz transceiver that applies a heterodyne structure-based linear frequency modulation-frequency shift keying (LFM-FSK) front-end module (FEM) is presented. An LFM-FSK waveform generator is proposed for the transceiver design to avoid ghost target detection in a multi-target environment. This FEM consists of three parts: a frequency synthesizer, a 77 GHz up/down converter, and a baseband block. The purpose of the FEM is to make an appropriate beat frequency, which will be the key to solving problems in the digital signal processor (DSP). This paper mainly focuses on the most challenging tasks, including generating and conveying the correct transmission waveform in the 77 GHz frequency band to the DSP. A synthesizer test confirmed that the developed module for the signal generator of the LFM-FSK can produce an adequate transmission signal. Additionally, a loop back test confirmed that the output frequency of this module works well. This development will contribute to future progress in integrating a radar module for multi-target detection. By using the LFM-FSK waveform method, this radar transceiver is expected to provide multi-target detection, in contrast to the existing method.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.51 no.1
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• pp.18-27
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• 2002

This paper presents an implementation of digital high-performance speed sensorless control system of an induction motor drives with Direct Torque Control(DTC). The system consists of closed loop stator flux and torque observer, speed and torque estimators, two hysteresis controllers, an optimal switching look-up table, IGBT voltage source inverter, and TMS320C31 DSP controller board. The stator flux observer is based on the combined current and voltage model with stator flux feedback adaptive control for wide speed range. The speed estimator is using the model reference adaptive system(MRAS) with rotor flux linkages for speed turning signal estimation. In order to prove the suggested speed sensorless control algorithm, and to obtain a high-dynamic robust adaptive performance, we have some simulations and actual experiments at low(20rpm) and high(1000rpm) speed areas. The developed speed sensorless system are shown a good speed control response characteristic, and high performance features using 2.2[kW] general purposed induction motor.

• Proceedings of the KIEE Conference
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• summer
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• pp.1477-1479
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• 2004

Increasing numbers of photovoltaic arrays are being connected to the power utility through the power conditioning systems (PCS). This has raised potential problems of network protection. If, due to the action of the PCS, the local network voltage and frequency remain within regulatory limits when the utility is disconnected, then islanding is said to occur. In this paper, the representative methods to prevent the islanding are described and a PSIM-based model and analysis of the reactive power variation (RPV) method are presented. A novel phase detector using the all-pass filter and digital phase locked loop (DPLL) is proposed especially for the single-phase PCS. Finally, this paper provides the simulation and experimental results with a single-phase 3kW prototype PCS. Islanding test method of IEEE Std. 929-2000 was performed for verification.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.55 no.1
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• pp.33-38
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• 2006

This paper proposes a simple MPPT control scheme of a based Current-Control-Loop system that can be obtains a lot of advantage to compare with another digital control method, P&O(Perturbation and Observation) and IncCond(Incremental Conductance) algorithm, that is applied mostly a PV system. An existent method is needed an expensive processor such as DSP that calculated to change the measure power of a using current and voltage sensor at the once. Therefore, it is applied a small home power generation system that required many expenses. But, a proposed method is easy to solve the cost reduction and power unbalance Problems that it is used by control scheme to limit error of a current control of common sensor. This proposed algorithm had verified through a simulation and an experiment results on battery charger using PIC that is the microprocessor of a low price.

• Journal of Electrical Engineering and Technology
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• v.6 no.5
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• pp.658-665
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• 2011

In the present paper, a novel fast peak detector for single- or three-phase unsymmetrical voltage sags is proposed. The proposed detector is modified from a single-phase digital phase-locked loop based on a d-q transformation using an all-pass filter (APF). APF generates a virtual phase with $90^{\circ}$ phase delay. However, this virtual phase cannot reflect a sudden change of the grid voltage in the moment of voltage sag, which causes a peak value to be significantly distorted and to settle down slowly. Specifically, the settling time of the peak value is too long when voltage sag occurs around a zero crossing, such as phase $0^{\circ}$ and $180^{\circ}$. This paper describes the operating principle of the APF problem and proposes a modified all-pass filter (MAPF) to mitigate the inherent APF problem. In addition, a new fast peak detector using MAPF is proposed. The proposed detector is able to calculate a peak value within 0.5 ms, even when voltage sag occurs around zero crossing. The proposed fast peak detector is compared with the conventional detector using APF. Results show that the proposed detector has faster detection time in the whole phase range. Furthermore, the proposed fast peak detector can be effectively applied to unsymmetrical three-phase voltage sags. Simulation and experimental results verify the advantages of the proposed detector and MAPF.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.12
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• pp.1725-1731
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• 2017

In hysteresis simulation, the Preisach model is most widely used as the reliability. However, since the first-order transition curves used in the conventional Preisach model are very inconvenient for actual measurement, many researches have been made to simplify them. In this study, the minor loops obtained along the initial magnetization curve are used to obtain the Everett function used in the Preisach model. In other words, The Everett table is constructed by using the minor loops, and are applied to the magnetization dependent Preisach model to reconstruct the Everett table. In order to minimize the error, the spline interpolation method is used to complete the final Everett table and the hysteresis loop simulation is performed with the Everett table. Furthermore, it is applied to the inductor analysis to perform not only sinusoidal wave and square wave drive but also PWM wave drive considering hysteresis. The validity of the proposed method is confirmed by comparison with simulation and experiment.

• Journal of the Korean Institute of Navigation
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• v.4 no.1
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• pp.31-50
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• 1980

It does not seem necessarily practicable to keep the system always in optimal condition, athough the control system of the follow-up mechanism on the most marine gyro compasses is to be adjusted by the operator through the gain adjustment. Sometimes a sustained oscillation or an incorrect gyro reading occurs to the system. For such a system any systematical research or theoretical basis of the guide for the optimal gain adjustment has not been reported yet. As a basic investigation of the theoretical system analysis to solve the problems concerned, the author attempts in this paper to express the system in a mathematical model deduced from the results of the theoretical approach and the experimental observation of each element contained in the follow-up mechanism of Hokshin D-1 gyro compass, and to constitute an over-all closed loop transfer function. This funciton being reverted to a fourth orderlinear differential equation, the first order simultaneous differential equations are obtained by means of the state-variables. The latter equations are solved by the Runge-Kutta method with digital computer. By comparing the characteristic of the simulated over-all output with that of the experimental result, it is shown that both outputs are nearly consistent with each other. It is also expected that the system representation proposed by this paper is valid and will be a prospective means in a further study on the design and optimal adjustment of the system.

• Journal of Power Electronics
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• v.15 no.2
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• pp.346-355
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• 2015

On the basis of the conventional PID control algorithm, a modified adaptive PID (MA-PID) control algorithm is presented to improve the steady-state and dynamic performance of closed-loop systems. The proposed method has a straightforward structure without excessively increasing the complexity and cost. It can adaptively adjust the values of the control parameters ($K_p$, $K_i$ and $K_d$) by following a new control law. Simulation results show that the line transient response of the MA-PID is better than that of the adaptive digital PID because the differential coefficient $K_d$ is introduced to changes. In addition, experimental results based on a FPGA indicate that the MA-PID control algorithm reduces the recovery time by 62.5% in response to a 1V line transient, 50% in response to a 500mA load transient, and 23.6% in response to a steady-state deviation, when compared with the conventional PID control algorithm.