• Title/Summary/Keyword: Digital error correction

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High-performance Mobile Transmission Rate and Physical Layer Linear Error Correction Performance Verification (고성능 모바일의 전송율 향상을 위한 무선 통신 시스템의 물리계층 선형에러 성능 검증)

  • Chung, Myungsug;Lee, Jooyeoun;Jeong, Taikyeong
    • Journal of Korea Society of Industrial Information Systems
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    • v.22 no.3
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    • pp.19-26
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    • 2017
  • In this paper, a Linear Error Correction Code, Which is Applicable to Next Generation Wireless Communication System Technology, is Constructed Based on Performance Comparison and Transmission Based on the Premise of High Performance Mobile Rate Enhancement System. This is Because Data Rates are Becoming an Important Issue in Reed-Solomon Codes and Linear Error Code (LDPC) Used in the Physical Layer of Digital Communication and Broadcasting Technologies. Therefore, this paper Simulates the Performance of Reed - Solomon Code and LDPC Applied to Mobile Broadcasting DVB (Digital Video Broadcasting) System and Mobile Broadcasting in Digital Communication and Broadcasting, At this time, Technical Aspects of the Transmission Efficiency and Performance of the LDPC Replacing the Existing Reed-Solomon Code have been Verified from the Viewpoint of Efficiency.

A SEC-DED Implementation Using FPGA for the Satellite System (위성체용 2비트 오류검출 및 1비트 정정 FPGA 구현)

  • No, Yeong-Hwan;Lee, Sang-Yong
    • Journal of Institute of Control, Robotics and Systems
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    • v.6 no.2
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    • pp.228-233
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    • 2000
  • It is common to apply the technology of FPGA (Fie이 Programmable Gate Array) which is one of the design methods for ASIC(Application Specific IC)to the active components used in the data processing at the digital system of satellite aircraft missile etc for compact lightness and integration of Printed Circuit Board (PCB) In carrying out the digital data processing the FPGAs are designed for the various functions of the Process Control Interrupt Control Clock Generation Error Detection and Correction (EDAC) as the individual module. In this paper an FPGA chip for Single Error Correction and Double Error Detection (SEC-DED) for EDAC is designed and simulated by using a VLSI design software LODECAP.

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Bit-selective Forward Error Correction for 14Kbps SBC-APCM (AQB) over Digital Mobile Communication Channels (디지털 이동통신 채널상의 14Kbps SBC-APCM(AQB)를 위한 비트선택적 에러정정부호)

  • 김민구;이재홍
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.6
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    • pp.821-828
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    • 1990
  • A forward error correction (FEC) technique is presented for speech data in 16 Kbps digital mobile communications. 14Kbps SBC-APCM(AQB) and QPSK are used as speech coding and modulation techniques, respectively. Because each bit in a speech data block had different importance, applying FEC to speech data bit-selectively in more effective than applying FEC to all speech data equally. To select bits in a speech data block to be protected by FEC the bit error sensitivity of each bit is computed. For a few BCH and Reed-Solomon codes used as bit-selective FEC the performance of the coding technique is computed.

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Error Correction Technique of Distance Measurement for ToF LIDAR Sensor

  • Moon, Yeon-Kug;Shim, Young Bo;Song, Hyoung-Kyu
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.12 no.2
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    • pp.960-973
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    • 2018
  • This paper presents design for error correcting algorithm of the time of flight (ToF) detection value in the light detection and ranging (LIDAR) system sensor. The walk error of ToF value is generated by change of the received signal power depending on distance between the LIDAR sensor and object. The proposed method efficiently compensates the ToF value error by the independent ToF value calculation from the received signal using both rising point and falling point. A constant error of ~0.05 m is obtained after the walk error correction while an increasing error up to ~1 m is obtained with conventional method.

Co-Simulation for Systematic and Statistical Correction of Multi-Digital-to-Analog-Convertor Systems

  • Park, Youngcheol;Yoon, Hoijin
    • Journal of electromagnetic engineering and science
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    • v.17 no.1
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    • pp.39-43
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    • 2017
  • In this paper, a systematic and statistical calibration technique was implemented to calibrate a high-speed signal converting system containing multiple digital-to-analog converters (DACs). The systematic error (especially the imbalance between DACs) in the current combining network of the multi-DAC system was modeled and corrected by calculating the path coefficients for individual DACs with wideband reference signals. Furthermore, by applying a Kalman filter to suppress noise from quantization and clock jitter, accurate coefficients with minimum noise were identified. For correcting an arbitrary waveform generator with two DACs, a co-simulation platform was implemented to estimate the system degradation and its corrected performance. Simulation results showed that after correction with 4.8 Gbps QAM signal, the signal-to-noise-ratio improved by approximately 4.5 dB and the error-vector-magnitude improved from 4.1% to 1.12% over 0.96 GHz bandwidth.

Adaptive current-steering analog duty cycle corrector with digital duty error detection (디지털 감지기를 통해 전류 특성을 조절하는 아날로그 듀티 사이클 보정 회로)

  • Choi, Hyun-Su;Kim, Chan-Kyung;Kong, Bai-Sun;Jun, Young-Hyun
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.465-466
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    • 2006
  • In this paper, novel analog duty cycle corrector (DCC) with a digital duty error detector is proposed. The digital duty error detector measures the duty error of the clock and converts it into a digital code. This digital code is then used to accurately correct the duty ratio by adaptively steering the charge-pump current. The proposed duty cycle corrector was implemented using an 80nm DRAM process with 1.8V supply voltage. The simulation result shows that the proposed duty cycle corrector improves the settling time up to $70{\sim}80%$ at 500MHz clock frequency for the same duty correction accuracy as the conventional analog DCC.

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Error Correction of Real-time Situation Recognition using Smart Device (스마트 기기를 이용한 실시간 상황인식의 오차 보정)

  • Kim, Tae Ho;Suh, Dong Hyeok;Yoon, Shin Sook;Ryu, KeunHo
    • Journal of Digital Contents Society
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    • v.19 no.9
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    • pp.1779-1785
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    • 2018
  • In this paper, we propose an error correction method to improve the accuracy of human activity recognition using sensor event data obtained by smart devices such as wearable and smartphone. In the context awareness through the smart device, errors inevitably occur in sensing the necessary context information due to the characteristics of the device, which degrades the prediction performance. In order to solve this problem, we apply Kalman filter's error correction algorithm to compensate the signal values obtained from 3-axis acceleration sensor of smart device. As a result, it was possible to effectively eliminate the error generated in the process of the data which is detected and reported by the 3-axis acceleration sensor constituting the time series data through the Kalman filter. It is expected that this research will improve the performance of the real-time context-aware system to be developed in the future.

Residual Synchronization Error Elimination in OFDM Baseband Receivers

  • Hu, Xingbo;Huang, Yumei;Hong, Zhiliang
    • ETRI Journal
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    • v.29 no.5
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    • pp.596-606
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    • 2007
  • It is well known that an OFDM receiver is vulnerable to synchronization errors. Despite fine estimations used in the initial acquisition, there are still residual synchronization errors. Though these errors are very small, they severely degrade the bit error rate (BER) performance. In this paper, we propose a residual error elimination scheme for the digital OFDM baseband receiver aiming to improve the overall BER performance. Three improvements on existing schemes are made: a pilot-aided recursive algorithm for joint estimation of the residual carrier frequency and sampling time offsets; a delay-based timing error correction technique, which smoothly adjusts the incoming data stream without resampling disturbance; and a decision-directed channel gain update algorithm based on recursive least-squares criterion, which offers faster convergence and smaller error than the least-mean-squares algorithms. Simulation results show that the proposed scheme works well in the multipath channel, and its performance is close to that of an OFDM system with perfect synchronization parameters.

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Design of a 6bit 800MS/s CMOS A/D Converter Using Synchronizable Error Correction Circuit (동기화 기능을 가지는 오차보정회로를 이용한 6비트 800MS/s CMOS A/D 변환기 설계)

  • Kim, Won;Seon, Jong-Kug;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5A
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    • pp.504-512
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    • 2010
  • The paper proposes the 6bit 800MS/s flash A/D converter that can be applied to wireless USB chip-set. The paper simplified the error correction circuit and synchronization block as one circuit which are used respectively, and furthermore reduced the burden on the hardware. Comparing to the conventional error correction circuit, the proposed error correction circuit in this paper reduced 5 MOS transistors, the area of each error correction circuit is reduced by 9%. The A/D converter is fabricated with 0.18um CMOS 1-poly 6-metal process, and power dissipation is 182mW at 0.8Vpp input range and 1.8V supply voltage. The measured result shows 4.0bit of ENOB at 800MS/s conversion rate and 128.1MHz input frequency.

Correction method for the Variation of the Image Plane Generated by Various Symmetric Error Factors of Zoom Lenses of Digital Still Cameras and Estimation of Defect Rate Due to the Correction (디지털 카메라용 줌렌즈에서 대칭성 오차요인에 의한 상면 변화의 보정과 이에 따른 불량률 예측)

  • Ryu, Jae-Myung;Kang, Geon-Mo;Lee, Hae-Jin;Lee, Hyuck-Ki;Jo, Jae-Heung
    • Korean Journal of Optics and Photonics
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    • v.17 no.5
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    • pp.420-429
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    • 2006
  • In the zoom lens of digital still cameras with the variation of the image plane generated by various symmetric error factors such as curvature, thickness and refractive index error of each lens surface about the optic axis, we induce a theoretical condition to fix constantly the image plane by translating the compensator group of the zoom lens by using the Gaussian bracket. We confirm the validity of this condition by using three examples of general zoom lens types with 3, 4, and 5 groups, respectively. When these error factors are randomly changed within the range of tolerance according to the Monte Carlo method, we verify that the distributions of the degree of moving of the compensator are normal distributions at three zoom lens types. From capability analysis using these results, we theoretically propose the method estimating the standard deviation, that is, sigma-level, as a function of the maximum movement of the compensator.