• Journal of the Institute of Convergence Signal Processing
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• v.6 no.2
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• pp.95-99
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• 2005

This paper presents an accurate recovery method of the reference clock which is needed for network synchronization in two-way satellite multimedia systems compliant with DVB-RCS specification and which use closed loop method for burst synchronization. In these systems, the remote station transmits TDMA burst via return link. For burst synchronization, it obtains reference clock from program clock reference (PCR) defined by MPEG-2 system specification. The PCR is generated periodically at the hub system by sampling system clock which runs at 27MHz $\pm$ 30ppm. Since the reference clock is recovered by means of digital PLL(DPLL) using imprecise PCR values due to variable random jitter, the recovered clock frequency of remote station doesn't exactly match reference clock of hub station. We propose a robust recovery method of reference clock against random delay jitter The simulation results show that the recovery error is remarkably decreased from 5 clocks to 1 clock of 27MHz relative to the general DPLL recovery method.

• Journal of Astronomy and Space Sciences
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• v.20 no.3
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• pp.185-196
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• 2003

In this paper, we make a design study for a local oscillator system of the 100 ㎓ band cosmic radio receiving system. We use the YIG oscillator with digital driver which is the main oscillator. This oscillator has a good frequency and phase stability at some temperature variation, and the easy computer aided control characteristics. This total system designed to two subsystem, first is the oscillator system include YIG oscillator, tripler, harmonic mixer and triplexer etc., second is the PLL system to supply the precise and stable local oscillator frequency to mixer. The proposed local oscillator system in this paper can be used in a single or multi pixel receiver because this system can be lock the local oscillator frequency automatically using PC.

• Journal of Communications and Networks
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• v.7 no.3
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• pp.248-257
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• 2005

In this paper, we develop design procedures for carrier tracking loop for orthogonal frequency division multiplexing (OFDM) systems or other systems of blocked data. In such communication systems, phase error measurements are made infrequent enough to invalidate the traditional loop design methodology which is based on analog loop design. We analyze the degradation in the OFDM schemes caused by the tracking loop and show how the performance is dependent on the rms phase error, where we distinguished between the effect of the variance in the average phase over the symbol and the effect of the phase change over the symbol. We derive the optimal tracking loop including optional delay in the loop caused by processing time. Our solution is general and includes arbitrary phase noise apd additive noise spectrums. In order to guarantee a well behaved solution, we have to check the design against margin constraints subject to uncertainties. In case the optimal loop does not meet the required margin constraints subjected to uncertainties, it is shown how to apply a method taken from control theory to find a controller. Alternatively, if we restrict the solution to first or second order loops, we give a simple loop design procedure which may be sufficient in many cases. Extensions of the method are shown for using both pilot symbols and data symbols in the OFDM receiver for phase tracking. We compare our results to other methods commonly used in OFDM receivers and we show that a large improvement can be gained.

• Journal of Advanced Navigation Technology
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• v.2 no.1
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• pp.22-33
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• 1998

In the coherent-on-receiver radar system using the magnetron source, frequency synthesizer is employed as a STALO(Stable Local Oscillator) to keep the intermediate frequency stable. In this paper, X-band(8.4GHz~9.7GHz) single loop frequency synthesizer is designed and implemented by an indirect frequency synthesis technique. Phase comparison is performed by a digital PLL(Phase-Locked Loop) chip and the loop filter is designed for the low phase noise. The effects of loop component characteristics on the output phase noise are analyzed for single loop structures, and the calculated results are compared with the measured data.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.1A
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• pp.27-33
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• 2000

Gardner’s algorithm is one of the useful algorithm for NDD(Non-Decision Directed) symbol synchronization in PAM communications. But the algorithm has a weak point such as pattern noises increasing in multi-level PAM. To insert a pre-filter in the algorithm is able to reduce timing jitter and pattern noise. In this paper, we analyze statistical properties of NDD algorithm to find an optimal parameter of the pre-filter for improving timing jitter and PLL locking. As a simulation result, optimum value of pre-filter parameter, $\beta$, is 0.3 and 0.5 at the roll off factor of the channel, $\alpha$, is 0.5 and 1.0, respectively. Optimum parameters of the pre-filter for clock synchronization of all-digital 256-QAM demodulator is shown in the results.

• Journal of Internet Computing and Services
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• v.24 no.5
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• pp.37-50
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• 2023

In general, PLL or DDS are mainly used as precise and stable frequency synthesis methods. For stable operation, a PWM frequency generation algorithm was designed and implemented using FPGA. This is an algorithm that creates a frequency 8,192 times the target frequency and then performs the D flip-flop 13 times to generate multiple frequencies with a precision of 1 Hz. Using the designed algorithm, it is applied to the Berthing system for stopping trains in station. The applied product was developed and tested against the existing operating system to confirm its superior performance in terms of frequency generation accuracy.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.12
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• pp.71-78
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• 2005

In this paper, we propose a transceiver for noncoherent OOK(On-Off Keying) Ultra Wide Band system based on magnitude detection. The proposed transceiver are designed using 0.18 micron CMOS technology and verified by simulation using SPICE and measurement. The proposed transceiver consist of parallelizer, Analog-to-Digital converter, clock generator, PLL and impulse generator. The time resolution of 1ns is obtained with 125MHz system clocks and 8x parallelization is carried out. The synchronized eight outputs with 2-bit resolution are delivered to the baseband. Impulse generator produces 1ns width pulse using digital CMOS gates. The simulation results and measurement show the feasibility of the proposed transceiver for UWB communication system.

• Journal of Broadcast Engineering
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• v.4 no.2
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• pp.164-175
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• 1999

Based on the performance analyses for transmission channel and signal characteristics in digital satellite broadcasting system. the optimal design parameter values for system using QPSK modulation technique were proposed in this paper. The proper performance degradation were of 2.0dB for channel characteristics. O.4dB for transmission signal characteristics and 0.2dB for receiver characteristics. respectively. In this case. the design objectives for system parameters were within ${\pm}\;0.5dB$ for gain flatness in 27MHz bandwidth. and O.1nsec/MHz and $0.2sec/MHz^2$ for linear and parabolic group delay. respectively. Also. the optimal parameter values that provide the maximum availability were of OdB OBO for satellite transponder TWTA. and the optimal bandwidth for PLL circuit was of 40kHz with 0.707 damping factor. These analyses and design values can be available for high data rate transmission system via satellite.

• Korean Journal of Optics and Photonics
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• v.11 no.5
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• pp.306-311
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• 2000

This paper deals with the development of Laser Doppler Vibrometer (LDV) that can mea~ure the tlequency and amphlude of the ultrasonic vibralion. Hc-Ne laser (632.8 om) is used as a light source, and Michelson interferometer in winch frequency of the objective beam is shIfted by Bragg cell IS adopted The frequency modulated signal centered at 40 MHz flom the PIN diode IS amplified. down-col1vel1ed to 2.5 MHz, filtered and digiLized. The voltage output that is proportional to the velocity of the vibratwg surface is obtawed using digItal PLL. A microprocessor is used to extract the frequcncy aud amplitude of the vibratIOn from the voltage output. It is found that the developed LDV can measure up to 300 kHz vibratIOn and the mlillmUITI measurable amplitude is I nm at 300 kHz. We believe thatlhis LDV can be used to measure the vibratIOn of the heavy electric maclllnery and micro-size structures. tures.

• Journal of IKEEE
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• v.25 no.4
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• pp.721-727
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• 2021

This paper proposes a UWB (Ultar-wideband) impulse generator using the gated ring oscillator. The oscillator and PLL circuits which generate a several GHz LO signal for the conventional architecture are replaced with the gated ring oscillator. Therefore, the system complexity is decreased. The proposed architecture controls the duty of enable signal, which is used for the head switch of ring oscillator. The control of the duty enables to tun off the oscillator during the guard interval and stop wasting the power consumption. The pulse shaping method using the counter makes the small side lobe and preserves the bandwidth regardless of the change on the center frequency. Designed UWB impulse generator could change the center frequency from 6.0 GHz to 8.8 GHz with a digital bit control, while it preserves the bandwidth as about 1.5 GHz.