• Title/Summary/Keyword: Digital Output

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Digital Control of an AC/DC Converter using the Power Balance Control Technique with Average Output Voltage Measurement

  • Wisutmetheekorn, Pisit;Chunkag, Viboon
    • Journal of Power Electronics
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    • v.12 no.1
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    • pp.88-97
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    • 2012
  • This paper presents a method for the digital control of a high power factor AC/DC converter employing the power balance control technique to achieve a fast response of the output voltage control. To avoid the effects of an output voltage ripple in the voltage control loop, the average output voltage is sampled and used as a feedback signal for the output voltage controller. The proposed control technique was verified by simulations using MATLAB/Simulink and its implementation was realized by a dsPIC30F4011 digital signal processor to control a CUK topology AC/DC converter with a 48V output voltage and a 250 W output power. The experimental results agree with the simulation results. The proposed control technique achieves a fast transient response with a lower line current distortion than is achieved when using a conventional proportional-integral controller and the power balance control technique with the conventional sampling method.

LC output filter for high accuracy and stability digital controlled MPS at PLS (포항가속기연구소 디지탈 전자석 전원장치의 LC 출력필터)

  • Kim, S.C.;Ha, K.M.;Huang, J.Y.;Choi, J.H.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.106-108
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    • 2005
  • High accuracy and stability digital controlled power supply for magnet is developed at PLS. This power supply has three sections. The first section is digital controller including DSP&FPGA and precision ADC, the second section consists of IGBT driver and four quad IGBT switch, and the third section is LC output filter section. AC input voltage of power supply is 3-phase 21V, output current is 0 ${\sim}$ 150 A dc. Switching frequency of four quad IGBT switch is 25 kHz. The output current of power supply has very high accuracy of 100 A step resolution at full range and the stability of +/- 1.5 ppm for short term and +/- 5 ppm for long term. This paper describes characteristics of filter and output current performance improvement after LC output filter at four quad digital power supplies.

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Mechanically Modulated Nonlinear Digital Microactuators for Purified Digital Stroke and Nano-Precision Actuation (기계적 비선형 변조기를 이용한 디지털 구동의 안정화와 나노 구동정도 구현을 위한 디지털 마이크로액추에이터)

  • 이원철;진영현;조영호
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.28 no.12
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    • pp.1990-1996
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    • 2004
  • This paper presents a nonlinearly modulated digital actuator (NMDA) for producing nano-precision digital stroke. The NMDA, composed of a digital microactuator and a nonlinear micromechanical modulator, purifies the stroke of the digital actuator in order to generate the high-precision displacement output required for nano-positioning devices. The function and concept of the nonlinear micromechanical modulator are equivalent to those of the nonlinear electrical limiters. The linear and nonlinear modulators, having an identical input and output strokes of 15.2${\mu}{\textrm}{m}$ and 5.4${\mu}{\textrm}{m}$, are designed, fabricated and tested, respectively. The linear and nonlinear modulators are linked to identical digital actuators in order to compare the characteristics of the linearly modulated microactuator (LMDA) and NMDA. In addition, an identical linear modulator is attached to the output ports of LMDA and NMDA. The NMDA shows the repeatability of 12.3$\pm$2.9nm, superior to that of 27.8$\pm$2.9nm achieved by LMDA. When the identical linear modulator is connected to LMDA and NMDA, the final modulated output from NMDA shows the repeatability of 10.3$\pm$7.2nm, superior to that of 15.7$\pm$7.7nm from LMDA. We experimentally verify the displacement purifying capability of the nonlinear mechanical modulator, applicable to nano-precision positioning devices and systems.

A Study on the Application of the Digital Architecture Model Fabrication for Digital Design Education (디지털 설계교육을 위한 디지털 건축모형제작 기술 적용에 대한 연구)

  • Ha, Seung-Beom;Lee, Kang-Bok
    • Journal of The Korean Digital Architecture Interior Association
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    • v.12 no.1
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    • pp.25-33
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    • 2012
  • Ever since the local interior and architecture design industry adopted Digital fabrication modeling tool for its design operation in early 1990's, working environment has been changing. The Purpose of study is to analyze the digital Architecture fabrication modeling for digital design education in academy course. Digital Design Tools, Digital Space and Form, Digital Materiality and Digital Production. The Digital fabrication modeling is and important role in a traditional design process and digital design process. It is comprised of digital input devices(3D digitizer, 3D design tools) and digital output devices(cutting plotters, laser cut, CNC machines, 3D printers). Digital input devices can be shift a traditional design process to digital design process. Digital output devices are the principle of digital fabrication by CAD/CAM. Also, the result of this study provide the fundamental data for physical resources and digital design curriculum in KAAB.

A study on a digital load cell for the removal of load cell noise (Load Cell Noise 제거를 위한 Digital Load Cell 에 대한 연구)

  • Lee, Young-Jin;Lee, Heung-Ho
    • Proceedings of the KIEE Conference
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    • 2002.11c
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    • pp.562-564
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    • 2002
  • Noise reduction and a simplification of a precision measurement system has been performed by changing analog output mode of a load cell into digital output mode. Usually, analog output signal of a few $\mu V$ from a load cell are amplified by amp and acquired by A/D converter. If the distance from a load cell to a DAS(Data Acquisition System) increases, more noise signals are mixed. So, a microprocessor has been integrated into a load cell so that the amplification and A/D conversion of output signals could be done in close proximity to the lode cell for the reduction in mixing of noise. Obtained data from the load cell like this manner are transferred to a computer with digital values(of TTL level). To simplify the configuration of a multi-channel DAS, RS-485 communication system has used for data transfer.

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Design of a Time-to-Digital Converter without Delay Time (지연시간 없는 시간-디지털 신호 변환기의 설계)

  • Choe, Jin-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.5
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    • pp.323-328
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    • 2001
  • A new time-to-digital converter is proposed which is based on a capacitor and a counter. The conventional time-to-digital converter requires rather longer processing time than the input time interval to obtain an accurate digital output. The resolution of the converted digital output is constant independent on the input time interval. However this study proposes the circuit in which the converted digital output can be obtained without delay time, and both the input time interval and the resolution can be easily improved through controlling passive device parameters.

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Digital Power IC design using VHDL and FPGA (VHDL과 FPGA를 이용한 Digital Power IC 설계)

  • Kim, Min Ho;Koo, Bon Ha;Yang, Oh
    • Journal of the Semiconductor & Display Technology
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    • v.12 no.4
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    • pp.27-32
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    • 2013
  • In this paper, the boost converter was implemented by digital control in many applications of the step-up. The PWM(pulse width modulation) control module of boost converter was digitized at power converter using the FPGA device and VHDL. The boost converter was designed to output a fixed voltage through the PI control algorithm of the PWM control module even if input voltage and output load are variable. The boost converter was digitized can be simplified by reducing the size of the module and the external control components. Thus, the digital power IC has advantageous for weight reduction and miniaturization of electronic products because it can be controlled remotely by setting the desired output voltage and PWM control module. The boost converter using the digital power IC was confirmed through experiments and the good performances were showed from experiment results.

New soft-output MLSE equalization algorithm for GSM digital cellular systems

  • 한상성;노종선;정윤철;김관옥;신윤복;함승재;이상봉
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.3
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    • pp.747-752
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    • 1996
  • In this paper, we propose a new SO-MLSE(soft-output maximum likelihood sequence estimation) equalizer, which can be used in GSM digital cellular system) it uses complex correlation of training sequence to obtain the channel information and the equalization is performed by MLSE using Viterbi algorithm. In order to generate a soft-decision input to channel decoder (Viterbi decoder), the soft-output equalization algorithm is needed. The adopted algorithm doesn't require to modify the structure of HO-MLSE(hard output MLSE) equalizer, that is, SO-MLSE equalizer can be implemented by adding soft-output generation block to HO-MLSE equalizer. This algorithm uses the outputs of matched filter and HO-MLSE equalizer. It turns out that the complexity of proposed SO-MLSE equalizer is simpler than those of other SO-MLSE equalizer and its perforance is almost the same as those of others. Finally, the proposed SO-MLSE equalizer is also implemented s a prototype with ADSP-2101 16-bits fixed point digital signal processing chip.

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An Analysis of Multi-processor System Performance Depending on the Input/Output Types (입출력 형태에 따른 다중처리기 시스템의 성능 분석)

  • Moon, Wonsik
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.12 no.4
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    • pp.71-79
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    • 2016
  • This study proposes a performance model of a shared bus multi-processor system and analyzes the effect of input/output types on system performance and overload of shared resources. This system performance model reflects the memory reference time in relation to the effect of input/output types on shared resources and the input/output processing time in relation to the input/output processor, disk buffer, and device standby places. In addition, it demonstrates the contribution of input/output types to system performance for comprehensive analysis of system performance. As the concept of workload in the probability theory and the presented model are utilized, the result of operating and analyzing the model in various conditions of processor capability, cache miss ratio, page fault ratio, disk buffer hit ratio (input/output processor and controller), memory access time, and input/output block size. A simulation is conducted to verify the analysis result.

An improved linear sampled-data output regulators (개선된 선형 샘플치 출력 조절기)

  • 정선태
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.1726-1729
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    • 1997
  • In general, the solvability of linear robust output regulation problem are not preserved under time-sampling. Thus, it is found that the digital regulator implemented by itme-sampling of anlog output regulator designed based on the continuous-time linear system model is nothing but a 1st order approximation with respect to time-sampling. By the way, one can design an improved sampled-data regulator with respect to sampling time by utilizing the intrinsic structure of the system. In this paper, we study the system structures which it is possible to design an improved sampled-data regulator with respect to sampling time.

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