• 제목/요약/키워드: Digital Logic

검색결과 673건 처리시간 0.025초

원자력발전소 노내 중성자 분포 측정 설비의 디지털 제어시스템 개발 (Developing the Digital Control System of in-core Flux Mapping System for Nuclear Power Plant)

  • 신창훈;변승현;조병학
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 D
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    • pp.2432-2434
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    • 2003
  • 노내 중성자 분포 측정 설비는 원자로 내부의 중성자 분포를 측정하는 설비로서 원자로 내부를 이동하는 검출기의 구동 메커니즘 제어와 측정 데이터 취득을 위한 제어시스템이 요구된다. 이 설비는 발전소 건설 당시 도입되었던 제어시스템으로 운전되고 있으나 노후되어 디지털 제어시스템으로의 설비 개선 연구가 착수 되었다. 개발된 제어시스템은 산업표준 Programmable Logic Controller 및 소프트웨어 기반으로 설계되어 기능개선, 설계변경 및 예비품 확보에 유연하게 대처할 수 있고, 진보된 검출기 구동 메커니즘 제어와 검출기 데이터 취득 기능을 통하여 측정 작업의 완전 자동화가 가능하다. 특히, 다양한 진단 기법을 통하여 작업상황 및 설비의 상태를 파악하여 필요한 보호기능과 경보기능을 제공함으로써 설비의 안정적 운영과 정비가 편리하다. 현재 개발된 시스템은 고리1호기에 설치되어 주기적으로 노내 중성자 분포 측정 작업을 수행하고 있다.

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마이크로프로세서에 의한 WALSH 함수 발생기 구현 (A Microprocessor Based Design of Walsh Function Generator)

  • 안두수;박준훈;이명규;김종부
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 하계학술대회 논문집 A
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    • pp.303-305
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    • 1993
  • Walsh function and transform are important analytical tools for control theory and signal processing and have wide applications in those fields, especially in the field of digital communications. Therefore there is a need for a Walsh function generator in order to realize certain applications. And a number of different desists are known. But desist and implementation of such a generator through hardware logic nay give rise to orthogonality error. To develop Walsh function generator which gets rid of orthogonality error, this paper presents a microprocessor based design and implementation method.

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소용량 태양광발전용 PWM제어기의 하드웨어 구현방식 비교 (A comparative study on implementation methods of PWM controller in small scale solar energy system)

  • 이흥주;이준하
    • 한국산학기술학회논문지
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    • 제7권5호
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    • pp.963-969
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    • 2006
  • 본 연구에서는 태양광 발전시스템의 최대전력추종을 위해 퍼지 이론을 도입한 디지털 퍼지제어기를 설계하였다. 그리고 퍼지제어기의 디지털 설계를 위해 소용량 태양광 발전시스템의 각 부분을 구성하고 이를 적용하여 기존의 제어기와 비교 실험하였다. FPGA로 구현된 제어기는 기존의 마이크로프로세서로 구현된 제어기에 비해 일사량 변화에도 출력전압의 변동이 적은 안정적인 동작특성을 보였다.

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CPLD를 이용한 2상 스테핑 모터 드라이버의 성능개선 (Performance improvement of stepping motor driver using the CPLD)

  • 오태석;김일환
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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    • pp.910-915
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    • 2003
  • This paper describes the design of a 2-phase stepping motor driver using CPLD(Complex Programmable Logic Device). The driver IC such as L297 (SGS-Thomson Microelectronics), which is mostly used has some problems in PWM control because of the switching noise of power MOSFETs. It causes current ripple and acoustic noise. To improve theses characteristics, we proposed a new current control method that the output PWM frequency is almost constant using a digital filter. Also we proposed constant current method for 1-2 phase(half step) excitation. The proposed method is implemented with CPLD(Xilinx, XC9572-PC44). Experimental results show the effectiveness of the proposed method.

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퍼지 속도 제어기를 이용한 BLDD 모타의 이산 위치 제어 (Digital Position Control of BLDD Motor using Fuzzy Speed Controller)

  • 고종선;황재규;윤명중
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 하계학술대회 논문집 B
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    • pp.892-894
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    • 1993
  • In this paper, a new control for the robust position control of a brushless direct drive(BLDD) motor using fuzzy logic controller(FLC) is presented. The integral-proportional(IP) position with speed FLC is employed to obtain the robust BLDD motor system, which is approximately linearized using the field-orientation method for an AC servo. The speed FLC for a BLDD motor has the two rule tables. One is the coarse rule table for the transient state and another is the fine rule table for the steady state. The overall system is controlled by using the microprossor in IBMPC 486 and the the robustness is also obtained.

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An Integrated Software Testing Framework for FPGA-Based Controllers in Nuclear Power Plants

  • Kim, Jaeyeob;Kim, Eui-Sub;Yoo, Junbeom;Lee, Young Jun;Choi, Jong-Gyun
    • Nuclear Engineering and Technology
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    • 제48권2호
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    • pp.470-481
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    • 2016
  • Field-programmable gate arrays (FPGAs) have received much attention from the nuclear industry as an alternative platform to programmable logic controllers for digital instrumentation and control. The software aspect of FPGA development consists of several steps of synthesis and refinement, and also requires verification activities, such as simulations that are performed individually at each step. This study proposed an integrated software-testing framework for simulating all artifacts of the FPGA software development simultaneously and evaluating whether all artifacts work correctly using common oracle programs. This method also generates a massive number of meaningful simulation scenarios that reflect reactor shutdown logics. The experiment, which was performed on two FPGA software implementations, showed that it can dramatically save both time and costs.

증분 엔코더에서 발생하는 진동에 의한 에러와 해결방안에 관한 연구 (Error in Incremental Encoder Due to Vibration and Its Solution)

  • 남윤수;박해균
    • 한국정밀공학회지
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    • 제25권6호
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    • pp.55-61
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    • 2008
  • Incremental encoder is a common choice for measuring the rotational angle of an axis. It produces, however, some measurement errors, if some kinds of rotational vibration are occurred. Even by increasing the number of slits on the circular peripheral, these kinds of error can not be removed. It only decreases the probability of the error being generated by making the magnitude of encoder resolution smaller than that of the axial vibration. This paper investigates the error mechanism of incremental encoder and suggests a digital logic circuit that prevents the measurement error to happen.

뉴로-퍼지를 이용한 플라이휠 제어에 관한 연구 (Control of Magnetic Flywheel System by Neuro-Fuzzy Logic)

  • 양원석;김영배
    • 한국정밀공학회지
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    • 제22권6호
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    • pp.90-97
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    • 2005
  • Magnetic flywheel system utilizes a magnetic bearing, which is able to support the shaft without mechanical contacts, and also it is able to control rotational vibration. Magnetic flywheel system is composed of position sensors, a digital controller, actuating amplifiers, an electromagnet and a flywheel. This work applies the neuro-fuzzy control algorithm to control the vibration of a magnetic flywheel system. It proposes the design skill of an optimal controller when the system has structured uncertainty and unstructured uncertainty, i.e. it has a difficulty in extracting the exact mathematical model. Inhibitory action of vibration was verified at the specified rotating speed. Unbalance response, a serious problem in rotating machinery, is improved by using a magnetic bearing with neuro-fuzzy algorithm.

Design of a Voting Mechanism considering Safety for Reliable System Using EPLD and Reliability Analysis

  • Ryoo, Dong-Wan;Lee, Hyung-Jik;Lee, Jeun-Woo
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2001년도 ICCAS
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    • pp.40.2-40
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    • 2001
  • The protection system of the system communication, nuclear reactor and chemical reactor are representative of reliable system. This reliable system must be designed based on reliability as well as concept of safety, which is a failed system go a way of safe. Reliable system is composed of part of data acquisition, calculator, communication with redundancy, and a voter is important factor of reliability. Because it is serially connected. This paper presents a Design and Analysis of a Voting Mechanism considering Safety for reliable system Using EPLD. In the case of digital implementation a coincidence logic (voter) of reliable system, it needs CPU and memory, so increase a number of units. Therefore the failure rate and cost are increased on contrary when it is designed EPLD or FPGA.

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An efficient reliability estimation method for CNTFET-based logic circuits

  • Jahanirad, Hadi;Hosseini, Mostafa
    • ETRI Journal
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    • 제43권4호
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    • pp.728-745
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    • 2021
  • Carbon nanotube field-effect transistors (CNTFETs) have been widely studied as a promising technology to be included in post-complementary metal-oxide-semiconductor integrated circuits. Despite significant advantages in terms of delay and power dissipation, the fabrication process for CNTFETs is plagued by fault occurrences. Therefore, developing a fast and accurate method for estimating the reliability of CNTFET-based digital circuits was the main goal of this study. In the proposed method, effects related to faults that occur in a gate's transistors are first represented as a probability transfer matrix. Next, the target circuit's graph is traversed in topological order and the reliabilities of the circuit's gates are computed. The accuracy of this method (less than 3% reliability estimation error) was verified through various simulations on the ISCAS 85 benchmark circuits. The proposed method outperforms previous methods in terms of both accuracy and computational complexity.