• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.3
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• pp.285-293
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• 1999

In this paper, the novel digital frequency/phase controller, to control the invelter fed traveling wave type ultra-sonic m motor(USM) is proposed. This controller is used to control the drive frequency, phase difference and applied voltages of e each phase of the motor. Proposed digital controller has constructed with digital logic only, no more use digitallongleftarrowanalog h hybrid method of the conventional controller, in order to generate drive frequency and phase difference. Therefore, the c control system has become to velY simple structure. T\rvo types of controllers are designed, one is to control drive f frequency and phase difference, another has added voltage control function of each phase. Two full digital voltage/phase c controllers are implemented by using custom LSI and EPLD, the control pelformance and the simplicity ofthe proposed c controller is verified by expeJimental results.

• Proceedings of the KSRS Conference
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• 1999.11a
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• pp.158-164
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• 1999

This paper investigated and evaluated the NASA's Shuttle Imaging Radar-C (SIR-C) multiple frequency SAR data for differential backscattering effects of microwave from the surface geological materials overlying the skarn type mineralization. Although an integrated approach in mineral exploration is more cost effective and is well in use, there are still many technical and scientific issues to be further investigated and researched. In this study we have reprocessed several sets of previously surveyed exploration data and experimented with fuzzy logic digital fusion of the preprocessed data with respect to chosen exploration targets. Among the numerous fuzzy logic operators, which are currently available for a data driven integrated exploration strategy, we used varying combinations of fuzzy MIN, fuzzy MAX, and fuzzy SUM operators along with Gamma operator for fusion of exploration data, including the contact metamorphic zone information. The final exploration target tested was a skarn type W-Mo-F mineralization in the study area. The fuzzy logic derived mineral potential anomaly almost exactly matched the differential backscattering anomalies on the C-band and L-band SIR_C data when overlaid on each other. Although this high degree of correlation between these two data sets is remarkable, the differential backscattering anomaly over the skarn type W-Mo-F mineralization in the study area requires further investigation.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.5
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• pp.231-236
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• 2008

This paper proposes a cost-efficient and flexible FPGA-based logic circuit emulation platform. By improving the performance and adding more features, this new platform is an enhanced version of our LAPG. It consists of an FPGA-based hardware engine and software element to drive the emulation and monitor the results. It also provides an interactive verification environment which uses an efficient communication protocol through a bi-directional serial link between the host and the FPGA board. The experimental results show that this new approach saves $55%{\sim}99%$ of communication overhead compared with other methods. According to the test results, the new LAPG is more area efficient in complex circuits with many I/O ports.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.1
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• pp.47-56
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• 1999

As the density of logic gates of VLSI chips has rapidly increased, more number of I/O pins has been required. This results in bigger package size and higher packager cost. The package cost is higher than the cost of bare chips for high I/O count VLSI chips. As the density of logic gates increases, the reduction method of the number of I/O pins for a given complexity of logic gates is required. In this paper, we propose the novel I/O interface circuit using CTR (Constant-Transition-Rate) code to reduce 50% of the number of I/O pins. The rising and falling edges of the symbol pulse of CTR codes contain 2-bit digital data, respectively. Since each symbol of the proposed CTR codes contains 4-bit digital data, the symbol rate can be reduced by the factor of 2 compared with the conventional I/O interface circuit. Also, the simultaneous switching noise(SSN) can be reduced because the transition rate is constant and the transition point of the symbols is widely distributed. The channel encoder is implemented only logic circuits and the circuit of the channel decoder is designed using the over-sampling method. The proper operation of the designed I/O interface circuit was verified using. HSPICE simulation with 0.6 m CMOS SPICE parameters. The simulation results indicate that the data transmission rate of the proposed circuit using 0.6 m CMOS technology is more than 200 Mbps/pin. We implemented the proposed circuit using Altera's FPGA and confimed the operation with the data transfer rate of 22.5 Mbps/pin.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.24 no.1
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• pp.28-34
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• 2010

The pulse width modulation(PWM) method has been generally used as conventional method controlling luminance of LED(light emitting diode). PWM method as analog method with a relation that duty ratio of LED be proportional to luminance has weak point that it is not compatible with digital method of communication etc. In this paper, a experiment is conducted which the luminance of RGB LED be controlled by digital method. For this, the LED digital control system is developed which consist of LED driving circuits and digital logic circuits. By controlling the number of pluses on RGB LED versus digital input, various lighting colors is implemented and digital codes are optimized in order that measured x, y chromaticity coordinates of lighting colors are comprised in the CIE chromaticity coordinates area of targeted lighting colors. The result of this study can be utilized usefully in research on implementing full color by using remote control of LED lamp with digital communication.

• Journal of Computing Science and Engineering
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• v.11 no.1
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• pp.9-23
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• 2017

NuDE 2.0 (Nuclear Development Environment 2.0) is a formal-method-based software development, verification and safety analysis environment for safety-critical digital I&Cs implemented with programmable logic controller (PLC) and field-programmable gate array (FPGA). It simultaneously develops PLC/FPGA software implementations from one requirement/design specification and also helps most of the development, verification, and safety analysis to be performed mechanically and in sequence. The NuDE 2.0 now consists of 25 CASE tools and also includes an in-depth solution for indirect commercial off-the-shelf (COTS) software dedication of new FPGA-based digital I&Cs. We expect that the NuDE 2.0 will be widely used as a means of diversifying software design/implementation and model-based software development methodology.

• Journal of the Regional Association of Architectural Institute of Korea
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• v.21 no.5
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• pp.161-168
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• 2019

The use of various digital tools makes freeform modeling possible. At the same time, with the development of structural and construction technologies, Free-Form Architecture are beginning to be implemented realized, as the desired data extraction such as the size and coordinate points of the members is possible. Currently, in many cities around the world, Irregular-Shaped High-rise Buildings, which express the dynamic symbolism, are recognized for their landmark values. In order to realize the Irregular-Shaped High-rise Buildings, it is necessary to understand various fields such as the characteristics of digital tools, digital technique logic, design process, and construction method. In particular, it is important to plan Irregular-Shaped High-rise Buildings so that the various types of efficiency can be reviewed together, while generating understanding and formations from the initial design stage. Therefore, this study uses conceptual and parametric design tools related to form generation in digital architecture to analyze the details, methods, and characteristics of the Irregular-Shaped High-rise Buildings form generation process. In this paper, the parametric design tool is applied to study the various types of design and the process characteristics that can be considered in the initial design stage of the unstructured skyscraper.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2609-2612
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• 2003

This paper describes a 64 channel signal generator/analyzer module that is useful for verification and testing of digital circuits. It can perform logic analyzer function and signal generator function at the same time. The 64 Channel module is implemented with single FPGA chip for miniaturization, and an USB interface is used to increase portability of the module. Multiple modules can be used in parallel for the verification of large scale circuits. Moreover, since the module is implemented as a PC based system, one can configure convenient GUI(Graphic User Interface) environment.

• 전기의세계
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• v.26 no.3
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• pp.63-68
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• 1977

In this paper, the theory of pulse frequency modulated DC/DC power converter to obtain constant output voltage for all input voltage changes is discussed. The switch controller consisting of integrator and comparator determines the ON time of power switch-Thyristor-by the error between the load voltage and a load reference voltage. Resulting voltage and current waveforms have been studied theoretically in detail and verified experimentally for a resistive and inductive load condition. State equations for voltages and currents using binary logic variables are computed by digital computer. Comparison of these withe oscillograms obtained from an experimental model shows very close agreement.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.1953-1955
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• 2006

500[MW]급 대용량 보일러 통풍계통의 송풍기 맥동 감시 장치는 송풍기 이상 발생시 송풍기를 보호하기 위하여 정지시키는 기능을 한다. 그러나 송풍기 맥동 감시 장치의 빈번한 고장으로 신뢰성이 저하되고 운전에 영향을 미치므로 이것을 DCS 로직으로 구성하여 신뢰성을 향상시켰다.