• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.2
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• pp.253-258
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• 2012

A computationally efficient interpolation filter with a low-distortion performance is a key component to utilize the naturally-sampled pulse width modulation (NPWM) in a digital domain. To realize the efficient interpolation filter, we propose a novel design based on the recently-proposed modified Farrow filter. The proposed filter shows a better pass-band distortion performance maintaining similar degree of complexity compared with the conventional Lagrange interpolation filter. We achieve the maximum distortion deviation of 10-3 dB to 20-kHz audible frequency range and distortion reduction of 1/6 times compared with the Lagrange interpolation filter.

• Journal of the Korean Institute of Navigation
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• v.24 no.5
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• pp.443-450
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• 2000

Before some experiments were carried out with analog bandpass filter which used for filtering the noise included in sound source signal. And this filter was constituted by condenser, register and operational amplifier. Hut these elements made the phase characteristics to differentiate in each sensing channel and cause a little of measurement error. We made new measurement system that was substituted digital filter for the analog filter in order to develop the optimal system which could find the time delay between each sensors with high accuracy. This paper describes the new system's constitution and the function of each parts. Specially three digital filters were designed and applied to the digital signal processing Part. And a series of experiments were carried out with the source＇s distance 9.53meters and the random bearing interval within the limits of $0^{\circ}$ ~ $180^{\circ}$. As a result, we have recognized that the accuracy of measurements were differentiated by the methods what kind of digital filter were adopted. And we have confirmed the facts that IIR LPF was suitable for sound source's bearing measurement and FIR LPF reduced the range measurement error.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.7
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• pp.1346-1353
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• 2001

This paper presents an algorithm for the design of 2 dimension separable denominator digital filter(SDDF). The proposed algorithm is based on the reduced dimensional decomposition not only 2 dimension SDDF's but also of given 2 dimension specification. The frequency domain design of 2 dimension separable denominator digital filters based on the reduced dimensional decomposition can be realized when the given 2 dimension frequency specification are optimally decomposed into a pair of 1 dimension digital filter specification via singular value decomposition. the algorithm is computationally efficient and numerically stable. In case of the low pass filter, the approximation error of the proposed design algorithm is $e_{m}$=5.17, $e_{r1}$ =8.78, $e_{r2}$=7.34, while in case of band pass filter, the approximation error is $e_{m}$=13.00, $e_{r1}$=62.76, $e_{r2}$=62.7676.7676

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.3
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• pp.290-295
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• 2005

The incremental encoder has been mostly used to measure the speed and position of the motor. As the output signals of encoder are high frequency digital signals, they have much influence on radiation noises due to switching of the power semiconductor circuits. It is so difficult to suppress the noises with the conventional LPF. In this paper, the hardware digital filter for suppressing noises in the output signals of the encoder signals is developed. As both the clock frequency and counter in the digital filter for encoder are easily adjusted according to the kinds of noises, any noises in the encoder can be entirely eliminated. The performance of the digital filter has been verified by simulation and experimental results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.5
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• pp.611-618
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• 1993

A common requirement in digital communication systems is the generation of prescribed shape. The purpose of this paper is implement an efficient digital waveform filter by using the look-up table in the RDS(Radio Data System) encoder. And it has been shown that transmitted data can be recovered without an error. In order to implement an efficient waveform filter, the control algorithm is designed. For the purpose of composing an IC, the digital waveform filter is implemented by using the discrete elements. Moreover in this paper it has been proved that the proposed digital waveform filter can be applied to the RDS encoder.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.4
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• pp.624-632
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• 1994

In this paper, we implement modulator of 155Mbps 64QAM RF MODEM, CCITT G. 707 SDH(Synchronous Digital Hierachy) 1 level, for DMR(DIgital Microwave Radio) STM-1 transmission, PSF(Pulse Shaping Filter) plays an important role to analyze modulator. We use 7 orders elliptic filter instead of Chebychev filter(roll-off facter a=0.5)in this paper. we obtain that roll-off factor, a is 0.33, group delay is less than 10nsec using this filter. Also we get -20dBm output level after passing the PSF, and 0dBm output level after passing the IF amplifier.

• ETRI Journal
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• v.25 no.5
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• pp.345-355
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• 2003

In this paper, we propose a method for designing a class of M-channel, causal, stable, perfect reconstruction, infinite impulse response (IIR), and parallel uniform discrete Fourier transform (DFT) filter banks. It is based on a previously proposed structure by Martinez et al. [1] for IIR digital filter design for sampling rate reduction. The proposed filter bank has a modular structure and is therefore very well suited for VLSI implementation. Moreover, the current structure is more efficient in terms of computational complexity than the most general IIR DFT filter bank, and this results in a reduced computational complexity by more than 50% in both the critically sampled and oversampled cases. In the polyphase oversampled DFT filter bank case, we get flexible stop-band attenuation, which is also taken care of in the proposed algorithm.

• Journal of Korea Society of Digital Industry and Information Management
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• v.7 no.4
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• pp.133-139
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• 2011

In this paper, we propose a hybrid filter for noise reduction. The proposed method adjusts rational filtering direction according to an edge in the image using median filtered data. Rational filter modulates the coefficients of a linear lowpass filter to limit its action in presence of image details. By the ratio of polynomials in the input variables, rational filter reduces noise adaptively. Median filter is widely used to reduce impulse noise, but removes some details for highly corrupted images. Also, desirable details are removed when the window size is large. Our proposed algorithm combines rational filter and median filter. Thus, proposed method not only preserves edge, but also reduces noise in uniform region. Experimental results show that our proposed method has better quality than those by existing median and rational filtering methods.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.261-273
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• 2016

Reconfigurable finite impulse response (FIR) filters whose filter coefficients and filter order change dynamically during run-time play an important role in the software defined radio (SDR) systems, multi-channel filters, and digital up/down converters. However, there are not many reports on such reconfigurable designs which can support dynamic variation of filter order and filter coefficients. The purpose of this paper is to provide an architectural solution for the FIR filters to support run-time variation of the filter order and filter coefficients. First, two straightforward designs, namely, (i) single-MAC based design and (ii) full-parallel design are presented. For large variation of the filter order, two designs based on (iii) folded structure and (iv) fast FIR algorithm are presented. Finally, we propose (v) high throughput design which provides significant advantage in terms of hardware and/or time complexities over the other designs. We compare complexities of all the five structures, and provide the synthesis results for verification.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2196-2199
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• 2003

With the development of digital signal processor(DSP), digital pulse compressor (DPC) is commonly used in radar systems. A DPC is implemented by using finite impulse response(FIR) filter algorithm in time domain or fast Fourier transform(FFT) algorithm in frequency domain. This paper compares the computation complexity tot these two methods and calculates boundary Fm filter taps that determine which of the two methods is better based on computation amount. Also, it shows that the boundary FIR filter taps for DSP, ADSP21060, and those for computation complexity have similar characteristic.