• Title/Summary/Keyword: Digital AGC

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The Design of IQ Vector Modulator having AGC Function for IMT-2000 (AGC 기능을 갖춘 IMT-2000용 IQ 벡터 모듈레이터 설계)

  • 오인열;박종화;손광철;김태웅;전형준;나극환
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.6
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    • pp.575-583
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    • 2003
  • In thesis we applied the short or open reflection type for IQ vector modulator The open or short type is operated even exception of other redundancy circuit. Generally IQ vector modulator uses MESFET in performing reflection open or short, then minus voltage which is having complex structure is required to operate MESFET via IQ signal. However BJT can be substituted for MESFET, BJT is improved characteristics like as cutoff frequency, electron mobility and so on. We used BJT in IQ vector modulator which is compatible with TTL level in I,Q digital signal, and attached AGC function. We got the result of operations within ${\pm}$ 1$^{\circ}$ phase and ${\pm}$ 0.6 dB amplitude Variation With full range of 20 dB and Variation of ${\pm}$ 6$^{\circ}$ Phase and ${\pm}$ 0.5 dB amplitude Versus full temperature range.

Efficient Frame Synchronization Detector and Low Complexity Automatic Gain Controller for DVB-S2 (효율적인 디지털 위성 방송 프레임 동기 검출 회로 및 낮은 복잡도의 자동 이득 제어 회로)

  • Choi, Jin-Kyu;Sunwoo, Myung-Hoon;Kim, Pan-Soo;Chang, Dae-Ig
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.31-37
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    • 2009
  • This paper presents an efficient frame synchronization strategy with the identification of modulation type for Digital Video Broadcasting-Satellite second generation (DVB-S2). To detect the Start Of Frame (SOF) and identify a modulation mode at low SNR, we propose a new correlator structure and a low complexity Automatic Gain Controller (AGC). The proposed frame synchronization architecture can reduce about 93% multipliers and 89% adders compared with the direct implementation of the Differential - Generalized Post Detection Integration (D-GPDI) algorithm which is very complex and the proposed a low complexity AGC consists of only 5 multipliers and 3 adders. The proposed architecture has been thoroughly verified on the Xilinx Virtex II FPGA board.

An Improvement of Performance in a Satellite Antenna Tracking Control System for Mobile DAB Reception (DAB수신을 위한 이동체용 위성 안테나 트랙킹 시스템의 성능 개선)

  • Jeong Joong-Sung
    • Journal of Advanced Marine Engineering and Technology
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    • v.28 no.7
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    • pp.1178-1184
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    • 2004
  • This paper presents the development of a satellite antenna tracking control system using a plane antenna for mobile DAB(Digital Audio Broadcasting) reception. To track more rapidly in the antenna of this system, this simple tracking system only tracks a direction of azimuth using pendulum in the direction of elevation. This system should track using the AGC(Automatic Gain Control) of the signal level which can receive DAB in spite of the changing of point and movement of the mobile. The directional gyro sensor is attached to solve the delay time in the Proposed tracking algorithm. The effectiveness of both the stabilization and tracking algorithm is demonstrated through experiment measuring AGC signal level. The implemented satellite antenna tracking control system is shown to be excellent for mobile DAB reception.

A Design of Fuzzy PI Controller for Improving AE System of Mobile Digital Camera (모바일 디지털 카메라의 AE 시스템 개선을 위한 퍼지 PI 제어기 설계)

  • Cho, Sun-Ho;Kim, Dong-Han;Park, Chong-Kug
    • Journal of Institute of Control, Robotics and Systems
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    • v.15 no.8
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    • pp.786-791
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    • 2009
  • Recently, digital camera module has been extensively utilized in mobile devices. The digital camera module should be smaller and lighter than digital still camera module to be used in mobile device. But, mobile camera can't get high quality image as good as the one of digital still camera due to the optical limitation of minimized module. Especially, AE system of mobile camera occurs excessive hunting and oscillation due to miniaturization of module. In this paper, improved AE algorithm which is applied fuzzy PI control is suggested to compensate this point.

A study on the Turbine-Generator Governor Dynamic Characteristic Testing System (터빈-발전기 조속기의 동특성 시험시스템 개발에 관한 연구)

  • Choi, Hyung-Joo;Lee, Heung-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.10
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    • pp.1399-1411
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    • 2012
  • The grid frequency is controlled cooperatively by the governor of the Turbine-Generator and the automatic generation controller(AGC) of the KPX(Korea Power Exchange). It is a basic requirement that the reliability of the governor is verified to enhance the power system stability but it is not easy to confirm the response characteristics of the governor because all generators are operated in the grid system that has the constant voltage and frequency. Therefore, it is necessary to study a new test method in order to examine the governor dynamic characteristic in the similar fault conditions. A study has shown that it is verified to simulate the turbine-generator power control system, the governor response characteristic under limited conditions and contribution of AGC with the gas turbine generator simulation model as well as demonstrate the dynamic response of the governor with the developed governor dynamic characteristic tester based on digital controller while the turbine-generator is connected to the grid system. This tester is constructed by the built-in functions of the turbine-generator main controller. In this treatise, the theoretical background, development method and the results of both simulations and demonstrations are described as another way to verify the turbine-generator governor dynamic characteristics.

Design and Fabrication of RF evaluation board for 900MHz (900MHz대역 수신기용 RF 특성평가보드의 설계 및 제작)

  • 이규복;박현식
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.3
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    • pp.1-7
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    • 1999
  • A single RF transceiver evaluation board have been developed for the purpose of application to the 900MHz band transceiver contained RF-IC chip And environment test was evaluated. The RF-IC chipset includes LNA(Low Noise Amplifier), down-conversion mixer, AGC(Automatic Gain Controller), switched capacitor filter and down sampling mixer. The RF evaluation board for the testing of chipset contained various external matching circuits, filters such as RF/IF SAW(Surface Acoustic Wave) filter and duplexer and power supply circuits. With the range of 2.7~3.3V the operated chip revealed moderate power consumption of 42mA. The chip was well operated at the receiving frequency of 925~960MHz. Measurement result is similar to general RF receiving specification of the 900MHz digital mobile phone.

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A Design and Implementation of Digital Ultra-Narrowband Walky-Talky Using Direct Conversion Method (직접 변환 방식을 이용한 디지털 초협대역 무전기 설계 및 구현)

  • Chong Young-Jun;Kang Min-Soo;Yoo Sung-Jin;Chung Tae-Jin;Oh Seung-Hyeub
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.6 s.97
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    • pp.603-614
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    • 2005
  • In this paper, digital ultra-narrowband Walky-Talky using direct conversion method for CQPSK modulation scheme is implemented with satisfying the requirements of APCO P25. RF transceiver design and implementation scheme that minimize the influence of DC-offset and AC-coupling at ultra-narrowband is proposed. This scheme also minimizes the influence of nonlinear characteristic at power amplifier fir CQPSK modulation method. Test results of full system including DSP module and direct conversion RF transceiver show that FCC emission mask at 36.8 dBm PEP meets the standard requirements. The characteristic of receiver AGC by PWM control signal is linear at 40 dB dynamic range and voice communication at input power level of -116 dBm is successful. Also it is verified that the performance of BER versus frequency offset and versus SNR meets the standard requirements.

A Mixed-Signal IC for Magnetic Stripe Storage System (자기 띠 저장 시스템을 위한 혼성 신호 칩)

  • Lim, Shin-Il;Choi, Jong-Chan
    • Journal of IKEEE
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    • v.2 no.1 s.2
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    • pp.34-41
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    • 1998
  • An integrated circuit for magnetic stripe storage system is implemented. All the analog and digital circuits are integrated in one chip. The analog block contains preamplifier, peak detecter, comparator and reference generater. And digital block includes reference window signal generater, up/down counter for F/2F signal measurement, bit-error detection logic, and control logic. Both the encoding and decoding functions for F/2F signal processing are provided. An AGC(automatic gain control) circuit which was included in conventional circuits is eliminated due to optimized circuit design. Misreading prevention circuits are also proposed by fixing up new reference bit when broken bits are detected. The prototype chip is implemented using $0.8{\mu}m$ N-well CMOS technology and operates from 3.3 V to 7.5 V of supply voltage. It occupies a die area of $3.04mm^2(1.6mm{\times}1.9mm)$ and dissipates 8 mW with a 5 V supply voltage.

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A Novel Digital Automatic Gain Control for a WCDMA Receiver

  • Kim, Kyusheob;Sungbin Im;Kim, Chonghoon
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.1358-1361
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    • 2002
  • In this paper, we propose a new architecture of digital automatic gain control (AGC) for a wideband code division multiple access (WCDMA) receiver. The feature of the proposed architecture is simplicity, in that it does not utilize complicated mathematical functions such as log and its inverse. When the proposed algorithm is implemented using a field programmable gate array (FPGA) device, the number of slices used to implement is 130 over the total of 5120 slices (less than 3%) with 61.44 ㎒ clock. This algorithm has been successfully applied to commercial WCDMA base stations.

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A CMOS Readout Circuit for Uncooled Micro-Bolometer Arrays (비냉각 적외선 센서 어레이를 위한 CMOS 신호 검출회로)

  • 오태환;조영재;박희원;이승훈
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.1
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    • pp.19-29
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    • 2003
  • This paper proposes a CMOS readout circuit for uncooled micro-bolometer arrays adopting a four-point step calibration technique. The proposed readout circuit employing an 11b analog-to-digital converter (ADC), a 7b digital-to-analog converter (DAC), and an automatic gain control circuit (AGC) extracts minute infrared (IR) signals from the large output signals of uncooled micro-bolometer arrays including DC bias currents, inter-pixel process variations, and self-heating effects. Die area and Power consumption of the ADC are minimized with merged-capacitor switching (MCS) technique adopted. The current mirror with high linearity is proposed at the output stage of the DAC to calibrate inter-pixel process variations and self-heating effects. The prototype is fabricated on a double-poly double-metal 1.2 um CMOS process and the measured power consumption is 110 ㎽ from a 4.5 V supply. The measured differential nonlinearity (DNL) and integrat nonlinearity (INL) of the 11b ADC show $\pm$0.9 LSB and $\pm$1.8 LSB, while the DNL and INL of the 7b DAC show $\pm$0.1 LSB and $\pm$0.1 LSB.