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Efficient Frame Synchronization Detector and Low Complexity Automatic Gain Controller for DVB-S2  

Choi, Jin-Kyu (Department of Electrical Engineering, Ajou University)
Sunwoo, Myung-Hoon (Department of Electrical Engineering, Ajou University)
Kim, Pan-Soo (Electronics and Telecommunications Research Institute)
Chang, Dae-Ig (Electronics and Telecommunications Research Institute)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.46, no.2, 2009 , pp. 31-37 More about this Journal
Abstract
This paper presents an efficient frame synchronization strategy with the identification of modulation type for Digital Video Broadcasting-Satellite second generation (DVB-S2). To detect the Start Of Frame (SOF) and identify a modulation mode at low SNR, we propose a new correlator structure and a low complexity Automatic Gain Controller (AGC). The proposed frame synchronization architecture can reduce about 93% multipliers and 89% adders compared with the direct implementation of the Differential - Generalized Post Detection Integration (D-GPDI) algorithm which is very complex and the proposed a low complexity AGC consists of only 5 multipliers and 3 adders. The proposed architecture has been thoroughly verified on the Xilinx Virtex II FPGA board.
Keywords
DVB-S2; frame synchronization detector; modulation mode estimation; Automatic Gain Controller;
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  • Reference
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