• Title/Summary/Keyword: Differential output

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Optimal Operation Method of Microgrid System Using DS Algorithm (DS 알고리즘을 이용한 마이크로 그리드 최적운영기법)

  • Park, Si-Na;Rhee, Sang-Bong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.5
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    • pp.34-40
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    • 2015
  • This paper presents an application of Differential Search (DS) meta-heuristic optimization algorithm for optimal operation of micro grid system. DS algorithm has the benefit of high convergence rate and precision compared to other optimization methods. The micro grid system consists of a wind turbine, a diesel generator, and a fuel cell. The simulation is applied to micro grid system only. The wind turbine generator is modeled by considering the characteristics of variable output. One day load data which is divided every 20 minute and wind resource for wind turbine generator are used for the study. The method using the proposed DS algorithm is easy to implement, and the results of the convergence performance are better than other optimization algorithms.

On Identification of discrete system expressed by Network Model (네트워크형 이산 시스템의 동정에 관하여)

  • 석상문;강기중;이철영
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 1999.10a
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    • pp.101-108
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    • 1999
  • A discrete system has interpreted by using the network model, and PERT network is one of these methods. For the purpose of analysing the real system. it is necessary to measure the parameter of the real system. And system identification problem is to assume the parameter of a real system when we get to know the system model, the input data and output data. System identification method has been only developed to a system of which a structure has expressed a differential equation or a polynomial expression. But it has been scarcely developed yet in that case of network model. The aim of this paper is to examine a changes when new system isn introduced to the present system, The changes are as follows: how the present system will be changed, when the changes will be happened. In this paper, genetic algorithm is used to assume the parameter.

Stochastic along-wind response of nonlinear structures to quadratic wind pressure

  • Floris, Claudio;de Iseppi, Luca
    • Wind and Structures
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    • v.5 no.5
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    • pp.423-440
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    • 2002
  • The effects of the nonlinear (quadratic) term in wind pressure have been analyzed in many papers with reference to linear structural models. The present paper addresses the problem of the response of nonlinear structures to stochastic nonlinear wind pressure. Adopting a single-degree-of-freedom structural model with polynomial nonlinearity, the solution is obtained by means of the moment equation approach in the context of It$\hat{o}$'s stochastic differential calculus. To do so, wind turbulence is idealized as the output of a linear filter excited by a Gaussian white noise. Response statistical moments are computed for both the equivalent linear system and the actual nonlinear one. In the second case, since the moment equations form an infinite hierarchy, a suitable iterative procedure is used to close it. The numerical analyses regard a Duffing oscillator, and the results compare well with Monte Carlo simulation.

Azygos and right superior intercostal vein injury secondary to blunt trauma: a case report

  • Nima Yaftian;Benjamin Dunne;Phillip Antippa
    • Journal of Trauma and Injury
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    • v.36 no.1
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    • pp.53-55
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    • 2023
  • Azygos vein injuries are rare consequences of blunt trauma. When there is high drainage output from a right-sided intercostal catheter, an azygos injury must be considered in the differential diagnosis. We report the case of a 38-year-old male patient involved in a fall from a height during a motorcycle accident. Computed tomography demonstrated a large right-sided hemothorax and left-sided pneumothorax. The patient was transferred to the operating theatre and underwent a clamshell thoracotomy. A laceration in the azygos vein at the confluence of the arch of the azygos and the right superior intercostal vein was identified. Bleeding was controlled at the trifurcation. The patient survived and was discharged home on postoperative day 15.

MILP-Espresso-Based Automatic Searching Method for Differential Charactertistics (효율적인 MILP-Espresso 기반 차분 특성 자동 탐색 방법)

  • Park, YeonJi;Lee, HoChang;Hong, Deukjo;Hong, Seokhie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.28 no.3
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    • pp.533-543
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    • 2018
  • In this paper, we propose an MILP-based method for Optimal Probability of Bit-based Differential Characteristic in SP(Substitution-permutation) ciphers based on Automatic Differential Characteristic Searching Method of Sasaki, et al. In [13], they used input/output variables and probability variables seperatably, but we simplify searching procedure by putting them(variables) together into linear inequalities. Also, In order to decrease the more linear inequalities, we choose Espresso algorithm among that used by Sasaki, et al(Quine-McCluskey algorithm & Espresso algorithm). Moreover, we apply our method to GIFT-64, GIFT-128, SKINNY-64, and we obtained results in the GIFT(Active S-boxs : 6, Probabilities : $2^{-11.415}$) compared with the existing one.(Active S-boxs : 5, Probabilities : unknown). In case of SKINNY-64, we can't find better result, but can find same result compared with the existing one.

A Design of Novel Instrumentation Amplifier Using a Fully-Differential Linear OTA (완전-차동 선형 OTA를 사용한 새로운 계측 증폭기 설계)

  • Cha, Hyeong-Woo
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.1
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    • pp.59-67
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    • 2016
  • A novel instrumentation amplifier (IA) using fully-differential linear operational transconductance amplifier (FLOTA) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of a FLOTA, two resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into FLOTA converts into two same difference currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the FLOTA and realized the IA used commercial op-amp LF356. Simulation results show that the FLOTA has linearity error of 0.1% and offset current of 2.1uA at input dynamic range ${\pm}3.0V$. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the 60dB was 10MHz. The proposed IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 105mW at supply voltage of ${\pm}5V$.

Design of High-Speed Multi-Layer PCB for Ultra High Definition Video Signals (UHD급 영상구현을 위한 다층인쇄회로기판의 특성 임피던스 분석에 관한 연구)

  • Jin, Jong-Ho;Son, Hui-Bae;Rhee, Young-Chul
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.7
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    • pp.1639-1645
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    • 2015
  • In UHD high-speed video transmission system, when a signal within certain frequency region coincides electrically and structurally, the system becomes unstable because the energy is concentrated, and signal flux is interfered and distorted. For the instability, power integrity analysis should be conducted. To remove the signal distortion for MLB, using a high-frequency design technique for EMI phenomenon, EMI which radiates electromagnetic energy fluxed into power layer was analyzed considering system stabilization. In this paper, we proposed an adaptive MLB design method which minimizes high-frequency noise in MLB structure, enhances signal integrity and power integrity, and suppresses EMI. The characteristic impedance for multi-layer circuit board proposed in this study were High-Speed Video Differential Signaling(HSVDS) line width w = 0.203, line gap d = 0.203, beta layer height h = 0.145, line thickness t = 0.0175, dielectric constant εr = 4.3, and characteristic impedance Zdiff = 100.186Ω. When high-speed video differential signal interface board was tested with optimized parameters, the magnitude of Eye diagram output was 672mV, jittering was 6.593ps, transmission frequency was 1.322GHz, signal to noise was 29.62dB showing transmission quality improvement of 10dB compared to previous system.

A CMOS Readout Circuit for Uncooled Micro-Bolometer Arrays (비냉각 적외선 센서 어레이를 위한 CMOS 신호 검출회로)

  • 오태환;조영재;박희원;이승훈
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.1
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    • pp.19-29
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    • 2003
  • This paper proposes a CMOS readout circuit for uncooled micro-bolometer arrays adopting a four-point step calibration technique. The proposed readout circuit employing an 11b analog-to-digital converter (ADC), a 7b digital-to-analog converter (DAC), and an automatic gain control circuit (AGC) extracts minute infrared (IR) signals from the large output signals of uncooled micro-bolometer arrays including DC bias currents, inter-pixel process variations, and self-heating effects. Die area and Power consumption of the ADC are minimized with merged-capacitor switching (MCS) technique adopted. The current mirror with high linearity is proposed at the output stage of the DAC to calibrate inter-pixel process variations and self-heating effects. The prototype is fabricated on a double-poly double-metal 1.2 um CMOS process and the measured power consumption is 110 ㎽ from a 4.5 V supply. The measured differential nonlinearity (DNL) and integrat nonlinearity (INL) of the 11b ADC show $\pm$0.9 LSB and $\pm$1.8 LSB, while the DNL and INL of the 7b DAC show $\pm$0.1 LSB and $\pm$0.1 LSB.

Measurement of transmitted vibration to stapes and tympanic membrane by DFMT's vibration in implantable middle ear hearing devices (중이 이식형 보청기에서 DFMT의 진동에 의한 등골 및 고막 방향으로 전달되는 진동력 측정)

  • Lee, Myoung-Won;Seong, Ki-Woong;Lim, Hyung-Gyu;Kim, Min-Woo;Jung, Eui-Sung;Lee, Jang-Woo;Kim, Dong-Wook;Lee, Jyung-Hyun;Lee, Sang-Heun;Lee, Kyu-Yup;Cho, Jin-Ho
    • Journal of Sensor Science and Technology
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    • v.18 no.4
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    • pp.286-293
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    • 2009
  • The implantable middle ear hearing devices(IMEHDs) have been developed to overcome the conventional hearing aid's problem(ringing effect caused by the acoustic feedback, cosmetic problem, etc.). In the IMEHDs, the vibrating transducer is a key component because its vibration enables to hear for hearing impaired people. The vibrating transducer is implanted on ossicular chain by surgical operation. The coupling status between implanted transducer and ossicular chain has an effect on delivering vibrating force from transducer to stapes. Noninvasive method is required to investigate the output characteristics of IMEHDs after implementation. Recently, emitted sound pressure measuring method of tympanic membrane is proposed to investigate the output characteristics of IMEHDs. However, the relationship between displacement of stapes and sound pressure by tympanic membrane was not cleared. In this paper, displacement of stapes and sound pressure by tympanic membrane were measured using the differential floating mass transducer(DFMT) that implanted on the ossicular chain of the human temporal bone and physical ear model. Through the experiments results, the relationship between displacement of stapes and sound pressure by tympanic membrane was investigated.

A 125 MHz CMOS Delay-Locked Loop with 32-phase Output Clock (32 위상의 출력 클럭을 가지는 125 MHz CMOS 지연 고정 루프)

  • Lee, Kwang-Hun;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.1
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    • pp.137-144
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    • 2013
  • A delay-locked loop (DLL) that generates a 32-phase clock with the operating frequency of 125 MHz is introduced. The proposed DLL uses a delay line of $4{\times}8$ matrix architecture to improve a differential non-linearity (DNL) of the delay line. Furthermore, a integral non-linearity (INL) of the proposed DLL is improved by calibrating phases of clocks that is supplied to four points of an input stage of the $4{\times}8$ matrix delay line. The proposed DLL is fabricated by using $0.11-{\mu}m$ CMOS process with a 1.2 V supply. The measured operating frequency range of the implemented DLL is 40 MHz to 280 MHz. At the operating frequency of 125MHz, the measurement results shows that the DNL and INL are +0.14/-0.496 LSB and +0.46/-0.404 LSB, respectively. The measured peak-to-peak jitter of the output clock is 30 ps when the peak-to-peak jitter of the input clock is 12.9 ps. The area and power consumption of the implemented DLL are $480{\times}550{\mu}m^2$ and 9.6 mW, respectively.