• Proceedings of the Korean Nuclear Society Conference
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• 2003.10a
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• pp.97.2-97.2
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• 2003

• Journal of the Korea Institute of Information Security & Cryptology
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• v.29 no.6
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• pp.1259-1270
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• 2019

The upper bound of differential characteristic probability is mainly used to determine the number of rounds when constructing a block cipher. As the number of rounds affects the performance of block cipher, it is critical to evaluate the tight upper bound in the constructing process. In order to calculate the upper bound of differential characteristic probability, the previous searching methods for minimum number of active S-boxes constructed constraint equations for non-linear operations and linear operations, independently. However, in the case of BOGI design strategy, where linear operation is dependent on non-linear operation, the previous methods may present the less tight upper bound. In this paper, we exploit the properties of BOGI strategy to propose a new method to evaluate a tighter upper bound of differential characteristic probability than previous ones. Additionally, we mathematically proved the validity of our method. Our proposed method was applied to GIFT-64 and GIFT-128, which are based on BOGI strategy, and the upper bounds of differential characteristic probability were derived until 9 round. Previously, the upper bounds of differential characteristic probability for 7-round GIFT-64 and 9-round GIFT-128 were 2^-18.395 and 2^-26.885, respectively, while we show that the upper bounds of differential characteristic probability are more tight as 2^-19.81 and 2^-28.3, respectively.

• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.234-235
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• 2006

The protection relay keeps electric power facilities by using signals of the voltage and current which are input and output terminals of each equipment. Each relay performances protection algorithm by using informations of own protecting zone. To prevent the mal-operation in inrush current, established transformer differential protection method uses the second harmonics as blocking signal. This method is not operate at the initial inrush. However, in case of the parallel operation, if the initial inrush is occurred in one transformer which is generated, the sympathetic inrush Is occurred in adjacent transformer. This paper approach the sympathetic inrush detecting algorithm of a transformer based on agent. Proposed algorithm, when inrush current occurred, distinguish sympathetic inrush or not by using differential current of adjacent transformer. This algorithm have the advantage of the distinguishing initial inrush and sympathetic inrush at operation of parallel transformer

• Journal of Korean Neurosurgical Society
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• v.50 no.4
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• pp.381-384
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• 2011

The authors report a case of atypical extraventricular neurocytoma (EVN) transformed from EVN which had been initially diagnosed as an oligodendroglioma 15 years ago. An 8-year-old boy underwent a surgical resection for a right frontal mass which was initially diagnosed as oligodendroglioma. When the tumor recurred 15 years later, a secondary operation was performed, followed by salvage gamma knife treatment. The recurrent tumor was diagnosed as an atypical EVN. The initial specimen was reviewed and immunohistochemistry revealed a strong positivity for synaptophysin. The diagnosis of the initial tumor was revised as an EVN. The patient maintained a stable disease state for 15 years after the first operation, and was followed up for one year without any complications or disease progression after the second operation. We diagnosed an atypical extraventricular neurocytoma transformed from EVN which had been initially diagnosed as an oligodendroglioma 15 years earlier. We emphasize that EVN should be included in the differential diagnosis of oligodendroglioma.

• Proceedings of the KIEE Conference
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• 2000.07d
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• pp.3181-3183
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• 2000

As the fact that the simple data of text and sound in early year have been changed to be high quality images and sounds. PLL(Phase-Locked Loop) system plays an important role in communication system. VCO(Voltage Controlled Oscillator) is the most important part in PLL system because it can have critical effects on operation of PLL. Recently, it has been raised the necessity of high speed and high accuracy circuit application. In this paper, a new differential voltage clamped VCO using negative-skewed path is suggested. Using a dual-delay scheme to implement the VCO, higher operation frequency and wider tuning are achieved simultaneously. The dual-delay scheme means that both the negative skewed delay paths and the normal delay paths exist in the same ring oscillator. The negative skewed delay paths decrease the unit delay time of the ring oscillator below the single inverter delay time. As a result, higher operation frequency can be obtained. The whole characteristics of VCO are simulated by using HSPICE. Simulation results show that the resulting operating frequencies are 50% higher than those obtainable from the conventional approaches.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.4
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• pp.291-296
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• 2015

This paper describes the design of a high-speed comparator for high-speed automatic test equipment (ATE). The normal comparator block, which compares the detected signal from the device under test (DUT) to the reference signal from an internal digital-to-analog converter (DAC), is composed of a rail-to-rail first pre-amplifier, a hysteresis amplifier, and a third pre-amplifier and latch for high-speed operation. The proposed continuous comparator handles high-frequency signals up to 800MHz and a wide range of input signals (0~5V). Also, to compare the differences of both common signals and differential signals between two DUTs, the proposed differential mode comparator exploits one differential difference amplifier (DDA) as a pre-amplifier in the comparator, while a conventional differential comparator uses three op-amps as a pre-amplifier. The chip was implemented with $0.18{\mu}m$ Bipolar CMOS DEMOS (BCDMOS) technology, can compare signal differences of 5mV, and operates in a frequency range up to 800MHz. The chip area is $0.514mm^2$.

• Journal of Biosystems Engineering
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• v.23 no.1
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• pp.75-82
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• 1998

Autonomous speedsprayer operation was conducted using a fuzzy controller combined with a DGPS. The signal of DGPS receiver and signals of four ultrasonic sensors were processed in real time. The speedsprayer was steered with two levers controlled by two hydraulic cylinders. The fuzzy controller has two inputs; direction of running obtained from the DGPS receiver and distance from trees measured by ultrasonic sensors. The operation times of the hydraulic cylinders were inferred as outputs of the fuzzy controller. Field test results showed that the speedsprayer could be autonomously operated by the developed fuzzy controller including turning operation in the end of the tree row. The ultrasonic sensors contributed a little to performance of the autonomous operation, but the speedsprayer could avoid trees or obstacles in emergent situations with them.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.35-42
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• 2004

A CMOS folding ADC with transistor differential pair folding circuit for low power consumption and high speed operation is presented in this paper. This paper explains the theory of transistor differential pair folding technique and many advantages compared with conventional folding and interpolation circuits. A ADC based on transistor differential pair folding circuit uses 16 fine comparators and 32 interpolation resistors. So it is possible to achieve low power consumption, high speed operation and small chip size. Design technology is based on fully standard 0.25${\mu}{\textrm}{m}$ double poly 2 metal n-well CMOS process. A power consumption is 45mW at 2.5V applied voltage and 250MHz sampling frequency. The INL and DNL are within $\pm$0.15LSB and $\pm$0.15LSB respectively. The SNDR is approximately 50dB at 10MHz input frequency.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.3
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• pp.465-475
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• 2022

Due to the impact of COVID-19, people are paying attention to convenience and health, and the use of IoT devices to help them is increasing. In order to embed a lightweight security element in IoT devices that need to handle sensitive information even with limited resources, the development of a lightweight S-box is essential. Until 2021, it was common to develop a lightweight 4-bit S-box by a heuristic method, and to develop an extended structure or repeat the same operation for a larger size lightweight S-box. However, in January 2022, a paper that proposed a heuristic algorithm to find an 8-bit S-box with better differential uniformity and linearity than the S-box generated with an MISTY extended structure, although non-bijective, was published [1]. The heuristic algorithm proposed in this paper generates an S-box by adding AND operations one by one. Whenever an AND operation is added, they use a method that pre-removes the S-box for which the calculated differential uniformity does not reach the desired criterion. In this paper, we improve the performance of this heuristic algorithm. By increasing the amount of pre-removal using not only differential uniformity but also other differential property, and adding a process of calculating linearity for pre-removing, it is possible to satisfy not only differential security but also linear security.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.479-481
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• 2006

This paper describes a 2.5V, 320MHz low-noise and low-power Phase Locked Loop(PLL) using a noise-rejected Voltage Controlled ring Oscillator(VCO) fabricated in a TSMC 0.25um CMOS technology. In order to improve the power consumption and oscillation frequency of the PLL, The VCO consist of three-stage fully differential delay cells that can obtain the characteristic of high speed, low power and low phase noise. The VCO operates at 7MHz -670MHz. The oscillator consumes l.58mA from a 320MHz frequency and 2.5V supply. When the PLL with fully-differential ring VCO is locked 320MHz, the jitter and phase noise measured 26ps (rms), 157ps (p-p) and -97.09dB at 100kHz offset. We introduce and analysis the conditions in which ring VCO can oscillate for low-power operation.