• Journal of the Microelectronics and Packaging Society
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• v.29 no.2
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• pp.99-105
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• 2022

As the chip size gets smaller, the width of the electrode line is also fine, and the density of interconnections is increasing. As a result, RC delay is becoming a problem due to the difference in resistance between the capacitor layer and the electrical conductivity layer. To solve this problem, the development of electrodes with high electrical conductivity and dielectric materials with low dielectric constant is required. In this study, we developed low dielectric ink by mixing commercial PSR which protect PCB's circuits from external factors and PI with excellent thermal property and low-k characteristics. As a result, the ink mixture of PSR and PI 10:3 showed the best results, with a dielectric constant of about 2.6 and 2.37 at 20 GHz and 28 GHz, respectively, and dielectric dissipation was measured at about 0.022 and 0.016. In order to verify the applicability of future applications, various line-width transmission lines produced on Teflon were evaluated, and as a result, the loss of transmission lines using low dielectric ink mixed with PI was 0.12 dB less on average in S21 than when only PSR was used.

• Journal of the Korean Vacuum Society
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• v.10 no.1
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• pp.27-30
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• 2001

Electromigration Phenomena in Al-1%Si thin film interconnections under DC and PDC conditions were investigated. Thin film interconnections with $SiO_2$ and PSG/$SiO_2$ dielectric passivation layer were formed by a standard photolithography process method and test line lengths were 100, 400, 800, 1200, and 1600 $\mu\textrm{m}$. The current density of $1.19\times10^7\textrm{A/cm}^2$ was stressed in Al-1%Si thin film interconnections under DC condition. The current density of $1.19\times10^7\textrm{A/cm}^2$ was also applied under PDC condition at the frequency of 1 Hz with the duty factor of 0.5. The electromigration resistance of PSG/SiO2 dielectric passivation test line was stronger than $SiO_2$ dielectric passivation test line. The lifetime under PDC was 2-4 times longer than DC condition. As the thin film interconnection line increased, the lifetime decreased and saturated over the critical length. Failure patterns by an electromigration were dominated by void-induced electrical open and hillock-induced electrical short.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.11
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• pp.949-955
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• 2009

In this study, we investigated the effects of Cr dopant (1.0 at% $Cr_2O_3$ sintered at $1000^{\circ}C$ for 1 h in air) on the bulk trap (i.e. defect) and interface state levels of ZnO using dielectric functions ($Z^*$, $M^*$, $Y^*$, $\varepsilon^*$, and $tan{\delta}$), admittance spectroscopy (AS), and impedance-modulus spectroscopy (IS & MS). For the identification of the bulk trap levels, we examine the zero-biased admittance spectroscopy and dielectric functions as a function of frequency and temperature. Impedance and electric modulus spectroscopy is a powerful technique to characterize grain boundaries of electronic ceramic materials as well. As a result, three kinds of bulk defect trap levels were found below the conduction band edge of ZnO in 1.0 at% Cr-doped ZnO (Cr-ZnO) as 0.11 eV, 0.21 eV, and 0.31 eV. The overlapped defect levels ($Zn^{..}_i$ and $V^{\cdot}_0$) in admittance spectra were successfully separated by the combination of dielectric function such as $M^*$, $\varepsilon^*$, and $tan{\delta}$. In Cr-ZnO, the interfacial state level was about 1.17 eV by IS and MS. Also we measured the resistance ($R_{gb}$) and capacitance ($C_{gb}$) of grain boundaries with temperature using impedance-modulus spectroscopy. It have discussed about the stability and homogeneity of grain boundaries using distribution parameter ($\alpha$) simulated with the Z"-logf plots with temperature.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.12
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• pp.936-941
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• 2010

In this study, we have investigated the effects of Mn dopant on the bulk trap levels and grain boundary characteristics of $Bi_2O_3$-based ZnO (ZB) varistor using admittance spectroscopy and dielectric functions (such as $Z^*,\;Y^*,\;M^*,\;\varepsilon^*$, and $tan\delta$). Admittance spectra and dielectric functions show two bulk traps of $Zn_i^{..}$ (0.20 eV) and $V^{\bullet}_o$ (0.29~0.33 eV) in ZnO-$Bi_2O_3-Mn_3O_4$ (ZBM). The barrier of grain boundaries in ZBM could be electrochemically single type. However, its thermal stability was slightly disturbed by ambient oxygen because the apparent activation energy of grain boundaries was changed from 0.79 eV at lower temperature to 1.08 eV at higher temperature. The grain boundary capacitance $C_{gb}$ was decreased slightly with temperature as 1.3~1.8 nF but resistance $R_{gb}$ decreased exponentially. The relaxation time distribution can result from the heterogeneity of the barriers constituting the varistor. It is revealed that Mn dopant in ZB reduced the heterogeneity of the barrier in grain boundaries and stabilized the barrier against the ambient temperature.

• 한국초전도학회:학술대회논문집
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• v.9
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• pp.75-82
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• 1999

TE$_{01\;{\delta}}$ mode Cavity Resonators with a low loss dielectric rod and YBa$_2Cu_3O_{7-{\delta}}$ (YBCO) endplates were prepared and their microwave properties were studied at temperatures above 30 K. Both sapphire and rutile were used as the dielectrics. The TE$_{01\;{\delta}}$ mode Q$_0$ of the resonator, designed to work as a tunable resonator with variations in the gap distance (s) between the dielectric rod and the top YBCO, was more than 1000000 at s = 0 mm and at 30 K and .the resonant frequency of 19.56GHz when a sapphire rod was used for the dielectric. The TE$_2Cu_3O_{7-{\delta}}$ mode resonant frequency (f$_0$) appeared to decrease as the temperature is raised. Meanwhile, the temperature dependence of the TE$_2Cu_3O_{7-{\delta}}$ mode f$_0$ of the rutile-loaded resonator appeared different with f$_0$ increasing according to the temperature and Q$_0$ more than 300000 at 30 K and f$_0$ = 8.56 CHz. Comparisons were made between the microwave properties of the sapphire-loaded and the rutile-loaded resonators. Also, applications of the TE$_2Cu_3O_{7-{\delta}}$ mode cavity resonator for a tunable resonator with a very high Q$_0$ as · well as a characterization tool for surface resistance measurements of HTS films are described.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.278.1-278.1
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• 2014

Organic materials have been explored as the gate dielectric layers in thin film transistors (TFTs) of backplane devices for flexible display because of their inherent mechanical flexibility. However, those materials possess some disadvantages like low dielectric constant and thermal resistance, which might lead to high power consumption and instability. On the other hand, inorganic gate dielectrics show high dielectric constant despite their brittle property. In order to maintain advantages of both materials, it is essential to develop the alternative materials. In this work, we manufactured nanocomposite gate dielectrics composed of organic material and inorganic nanoparticle and integrated them into organic TFTs. For synthesis of nanocomposite gate dielectrics, polyimide (PI) was explored as the organic materials due to its superior thermal stability. Candidate nanoprticles (NPs) of halfnium oxide, titanium oxide and aluminium oxide were considered. In order to realize NP concentration dependent electrical characteristics, furthermore, we have synthesized the different types of nanocomposite gate dielectrics with varying ratio of each inorganic NPs. To analyze gate dielectric properties like the capacitance, metal-Insulator-metal (MIM) structures were prepared together with organic TFTs. The output and transfer characteristics of organic TFTs were monitored by using the semiconductor parameter analyzer (HP4145B), and capacitance and leakage current of MIM structures were measured by the LCR meter (B1500, Agilent). Effects of mechanical cyclic bending of 200,000 times and thermally heating at $400^{\circ}C$ for 1 hour were investigated to analyze mechanical and thermal stability of nanocomposite gate dielectrics. The results will be discussed in detail.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.71-71
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• 2012

As the critical dimensions of integrated circuits are scaled down, the line width and spacing between the metal interconnects are made smaller. The dielectric film used as insulation between the metal lines contributes to the resistance-capacitance (RC) time constant that governs the device speed. If the RC time delay, cross talk and lowering the power dissipation are to be reduced, the intermetal dielectric (IMD) films should have a low dielectric constant. The introduction of Cu and low-k dielectrics has incrementally improved the situation as compared to the conventional $Al/SiO_2$ technology by reducing both the resistivity and the capacitance between interconnects. Some of the potential candidate materials to be used as an ILD are organic and inorganic precursors such as hydrogensilsequioxane (HSQ), silsesquioxane (SSQ), methylsilsisequioxane (MSQ) and carbon doped silicon oxide (SiOCH), It has been shown that organic functional groups can dramatically decrease dielectric constant by increasing the free volume of films. Recently, various inorganic precursors have been used to prepare the SiOCH films. The k value of the material depends on the number of $CH_3$ groups built into the structure since they lower both polarity and density of the material by steric hindrance, which the replacement of Si-O bonds with Si-$CH_3$ (methyl group) bonds causes bulk porosity due to the formation of nano-sized voids within the silicon oxide matrix. In this talk, we will be introduce some properties of SiOC(-H) thin films deposited with the dimethyldimethoxysilane (DMDMS: $C_4H_{12}O_2Si$) and oxygen as precursors by using plasma-enhanced chemical vapor deposition with and without ultraviolet (UV) irradiation.

• Journal of the Korean Ceramic Society
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• v.30 no.5
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• pp.397-403
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• 1993

Widely used dielectrics, barium titanate was promising material for ceramic capacitor. It was produced by specific formulation with various dopants-La2O3, ZrO2, SnO2, CaZrO3, CaTiO3, CaSnO3, Bi2O3, and etc.-according to demanded properties of capacitor. In this study, we would examinate the study of dielectric properties and temperatuer characteristics (T.C.) with the amount of Bi2O3. The sample was prepared with [BaTiO3]10＋[BaZrO3, SnO2, La2O3, ZrO2]10 and Bi2O3 varied from 1.0, 1.5, 2.0, 2.5 to 3.0wt%. After milling and mixing for 15hrs, each sample was dried and then pressed at 700kg/$\textrm{cm}^2$ into pellets. Pellets were fired at 131$0^{\circ}C$, for 3hrs in air. As the result of measurements, dielectric constant, break down voltage, and insulation resistance were increased with the amount of Bi2O3, and the resonant frequency was shifted from high frequency to low frequency range. In the case of temperature characteristics, capacitance change rate was symmetrically changed at -$25^{\circ}C$ and ＋85$^{\circ}C$ respectively. Therefore, it is recognized that the temperature characteristics can be moderated with doping Bi2O3 in our study.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.4
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• pp.69-74
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• 2019

The influence of measuring fixtures on the measurement of dielectric and piezoelectric properties of PMN-PT single crystal specimens was investigated. As the pressure of the jig pin which applied the AC electrical signal to the sample decreased, the lower resonance resistance was measured and the higher mechanical quality factor was calculated. The mechanical quality factor was 418 when the spring tension of the jig pin was 20grf, and the value of the quality factor was reduced by half when the spring tension was 200grf. The 4-probe fixture method is unsuitable for measuring piezoelectric properties, but it was suitable for the measurement of dielectric loss. In order to accurately evaluate the piezoelectric properties of PMN-PT, it is necessary to lower the spring tension of the jig pin as much as possible.

• The Journal of the Convergence on Culture Technology
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• v.9 no.3
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• pp.641-646
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• 2023

In this paper, TM(transverse magnetic) scattering problems by a resistive strip grating between a double dielectric layer are analyzed by using the FGMM(fourier galerkin moment method) known as a numerical method of electromagnetic fileld. The boundary conditions are applied to obtain the unknown field coefficients, the scattered electromagnetic fields are expanded in a series of Floquet mode functions, and the resistive boundary condition is applied to analysis of the resistive strip. Overall, as the uniform resistivity of the resistive strip increased, the size of the current density induced in the resistance band decreased, the reflected power decreased, and the transmitted power increased. In addition, As the thickness of the dielectric layer increased, the reflected power increased and the transmitted power relatively decreased. The numerical results of the structure proposed in this paper are shown in good agreement compared to the results of PMM, a numerical analysis method of the existing paper.