Defects and Grain Boundary Properties of Cr-doped ZnO

In this study, we investigated the effects of Cr dopant (1.0 at% $Cr_2O_3$ sintered at $1000^{\circ}C$ for 1 h in air) on the bulk trap (i.e. defect) and interface state levels of ZnO using dielectric functions ($Z^*$, $M^*$, $Y^*$, $\varepsilon^*$, and $tan{\delta}$), admittance spectroscopy (AS), and impedance-modulus spectroscopy (IS & MS). For the identification of the bulk trap levels, we examine the zero-biased admittance spectroscopy and dielectric functions as a function of frequency and temperature. Impedance and electric modulus spectroscopy is a powerful technique to characterize grain boundaries of electronic ceramic materials as well. As a result, three kinds of bulk defect trap levels were found below the conduction band edge of ZnO in 1.0 at% Cr-doped ZnO (Cr-ZnO) as 0.11 eV, 0.21 eV, and 0.31 eV. The overlapped defect levels ($Zn^{..}_i$ and $V^{\cdot}_0$) in admittance spectra were successfully separated by the combination of dielectric function such as $M^*$, $\varepsilon^*$, and $tan{\delta}$. In Cr-ZnO, the interfacial state level was about 1.17 eV by IS and MS. Also we measured the resistance ($R_{gb}$) and capacitance ($C_{gb}$) of grain boundaries with temperature using impedance-modulus spectroscopy. It have discussed about the stability and homogeneity of grain boundaries using distribution parameter ($\alpha$) simulated with the Z"-logf plots with temperature.

Cr을 첨가한 ZnO의 결함과 입계 특성