• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.6
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• pp.552-559
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• 2002

The EM(Engineering Model) LO(Local Oscillator) is designed for Ka-band satellite transponder. The VCO(Voltage Controlled Oscillator) is implemented using a high impedance inverter coupled with dielectric resonator to improve the phase noise performance out of the loop bandwidth. The phase of VCO is locked to that of a stable OCXO(Oven Controlled Crystal Oscillator) by using a SPD(Sampling Phase detector) to improve phase noise performance in the loop bandwidth. This LO exhibits the harmonic rejection characteristics above 43.83 dBc and requires 15 V and 160 mA. The phase noise characteristics are performed as -102.5 dBc/Hz at 10 KHz offset frequency and -104.0 dBc/Hz at 100 KHz offset frequency, respectively, with the output power of 13.50 dBm$\pm$0.33 dB over the temperature range of -20~+7$0^{\circ}C$.

• Journal of Navigation and Port Research
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• v.30 no.10 s.116
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• pp.847-853
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• 2006

In this paper, we designed VCO(voltage controlled oscillator} that is composed of a dielectric resonator and a varactor diode, and the PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The results at 12.05 GHz show the output power is 13.54 dBm frequency tuning range approximately +/- 7.5 MHz, and power variation over the tuning range less than 0.2 dB, respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 dBc/Hz at 100 kHz offset from carrier, and The second harmonic suppression is less than -41.49 dBc. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.3 no.1 s.4
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• pp.13-19
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• 2004

The VCO(Voltage Controlled Oscillator) with low phase noise and high reliability is implemented using nonlinear design, and its phase noise characteristics are compared with that of Lesson's equation. The microstripline coupled with dielectric resonator is realized as a high impedance inverter to improve the phase noise, and the qualify factor of resonator circuit can be transferred to active device with the enhanced the loaded quality factor. The worst case and part stress analyses are achieved to obtain the high reliability of VCO. The developed VCO has the oscillating tuning factor of 0.56MHz/V for the control voltage range of 0$\~$12V This VCO requires the DC power of 160mW. The phase noise characteristics exhibit good performances of -96.51dBc/Hz @ 10KHz and -116.3dBc/Hz @ 100KHz, respectively. And, the output power of 7.33 dBm is measured.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.4 no.2 s.7
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• pp.81-87
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• 2005

In this paper, a VCDRO(Voltage Control Dielectirc Resonator Oscillator) for signal source of doppler radar system is designed and fabricated. The proposed VCDRO is made with new tuning mechanism using CPW line. The coplanar waveguide of $\lambda_{g}$/2 in length with varactor diode is placed on the metallization side under the dielectric resonator and coupled to it. Tuning varactor diode is mounted at one end of the CPW. The proposed circuit tuned by a CPW allows one more varactor diode to be mounted on the optimized CPW, where a greater sensitivity of frequency tuning is needed. With varying the biasing voltage for the varactor diode from 0 V to 15 V, output frequency tuning of 12 MHz is obtained. The PLDRO exhibits output power of 16.5 dBm with phase noise in the phase locked state characteristic of -115 dBc/Hz at 100 Hz, -105 dBc/Hz at the 10 kHz, and -102 dBc/Hz at 1 Hz offset from 10.525 GHz , respectively.

• Proceedings of the KIEE Conference
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• 2001.11a
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• pp.96-99
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• 2001

In this paper, we present the simulation results of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonator, the oscillator and the buffer circuit. using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of the conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated using the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont 951AT, which will be applied for LTCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5[dBm], the phase noise was -104[dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of 9.5[mA]. The size of VCO is $6{\times}9{\times}2mm$(0.11[cc]).

• Journal of electromagnetic engineering and science
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• v.17 no.3
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• pp.138-146
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• 2017

A phase-locked dielectric resonator oscillator (PLDRO) is an essential component of millimeter-wave communication, in which phase noise is critical for satisfactory performance. The general structure of a PLDRO typically includes a dual loop of digital phase-locked loop (PLL) and analog PLL. A dual-loop PLDRO structure is generally used. The digital PLL generates an internal voltage controlled crystal oscillator (VCXO) frequency locked to an external reference frequency, and the analog PLL loop generates a DRO frequency locked to an internal VCXO frequency. A dual loop is used to ease the phase-locked frequency by using an internal VCXO. However, some of the output frequencies in each PLL structure worsen the phase noise because of the N divider ratio increase in the digital phase-locked loop integrated circuit. This study examines the design aspects of an interconnected PLL structure. In the proposed structure, the voltage tuning; which uses a varactor diode for the phase tracking of VCXO to match with the external reference) port of the VCXO in the digital PLL is controlled by one output port of the frequency divider in the analog PLL. We compare the proposed scheme with a typical PLDRO in terms of phase noise to show that the proposed structure has no performance degradation.

• Journal of electromagnetic engineering and science
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• v.5 no.1
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• pp.8-13
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• 2005

The InGaP/GaAs hetero-junction bipolar transistor(HBT) monolithic voltage-controlled dielectric resonator oscillator(VCDRO) is first demonstrated for a Ku-band low noise block down-converter(LNB) system. The on-chip voltage control oscillator core employing base-collector(B-C) junction diodes is proposed for simpler frequency tuning and easy fabrication instead of the general off-chip varactor diodes. The fabricated VCDRO achieves a high output power of 6.45 to 5.31 dBm and a wide frequency tuning range of ]65 MHz( 1.53 $\%$) with a low phase noise of below -95dBc/Hz at 100 kHz offset and -115 dBc/Hz at ] MHz offset. A]so, the InGaP/GaAs HBT monolithic DRO with the same topology as the proposed VCDRO is fabricated to verify that the intrinsic low l/f noise of the HBT and the high Q of the DR contribute to the low phase noise performance. The fabricated DRO exhibits an output power of 1.33 dBm, and an extremely low phase noise of -109 dBc/Hz at 100 kHz and -131 dBc/Hz at ] MHz offset from the 10.75 GHz oscillation frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.5
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• pp.715-722
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• 2000

In this paper, the PLDRO is designed and implemented for X-band. It is comprised of tunable high Q resonator with a varactor diode for frequency tuning, loop filter and a 1/8 prescaler which up to 10GHz. Also, it is implemented a TCXO and a VCO signal into the phase detector and achieved a highly stable signal source. From the measurement, the designed PLDRO has the output power of 2.5dBm at 8GHz and phase noise of -64.33dBc at 10KHz offset from carrier. Its characteristic is 26 dBc. This PLDRO has much better temperature stability.

• Journal of IKEEE
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• v.3 no.1 s.4
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• pp.79-85
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• 1999

In this paper, the resistive mixer for 5.86Hz wireless LAN, main part receiving system, was designed and implemented. The noise characteristics and the linearity in the base band was superior. For the use of local oscillator of mixer, dielectric resonator of stable output and temperature characteristics was designed. For the electrical tuning by the capacitance variation of varactor diode, the microstrip line and magnetic coupling characteristics of the dielectric resonance was used. It was obtained that gain of the proposed resistive mixer containing the RF cable loss, is -13.8dB, the conversion loss of frequency converter is -12 dB, and the output power of local oscillator is 1.67 dBm.

• Journal of Industrial Technology
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• v.29 no.B
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• pp.139-144
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• 2009

A Doppler radar is a radar using the doppler effect of the returned echoes from targets to measure their radial velocity. To be more specific the microwave signal sent by the radar antenna's directional beam is reflected toward the radar and compared in frequency, up or down from the original signal, allowing for the direct and highly accurate measurement of target velocity component in the direction of the beam. In this paper, we designed the doppler radar composed of 10.5 GHz band DROs(Dielectric Resonator Oscillator), $90^{\circ}C$ branch line coupler, single balanced mixer and $4{\times}4$ array antenna of high gain, high directivity, for non-contact type hydrometer. Fabricated Doppler radar can detect slow moving objects.