• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.7
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• pp.149-155
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• 1996

A new technique wasdeveloped which obtains selectively the htick fully recessed oxidized porous silicon layer (OPSL) with good dielectric property. The porous silicon layer was ocnverted to thick fully recessed oxide (FRO) with 3-step (1${\mu}$m, 1.5${\mu}$m, 1.8${\mu}$m) by multi-step thermal oxidation (after 400$^{\circ}$C, 1 hour by dry oxidation, 700$^{\circ}$C, 1 hour and then 1100$^{\circ}$C, 1 hour by wet oxidation). The breakdwon field of the FRO was about 2.5MV/cm and the leakage current was several pA ~ 100 pA in the range of 0 of 90 pF. The progress of oxidation of a porous silicon layer was studied by examining the infrared abosrption spectra. The refractive index (1.51) of the fRO, which was measured by ellipsometer, was comparable to that of the thermally grown silicon dioxide (1.46). The etching rate (1600${\AA}$/min) of the FRO was also almost equal to that of the thermal oxide.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.6
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• pp.164-171
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• 1996

We report the experimental resutls on AlGaAs/GaAs heterojunction bipolar transistors (HBTs) with carbon-doped base structure. To characterize the output power, load-pull mehtod was employed. By characterizing the devices with HP8510C, we extracted the small-signal equivalent circuit. The HBTs were fabricated employing wet mesa etching and lift-off process of ohmic metals. the implementation of polyimide into the fabriction process was accomplished to obtain the lower dielectric constant resultig in significant reduction of interconnect routing capacitance. The fabricated HBTs with an emitter area of 6${\times}14{\mu}m^{2}$ exhibited current gain of 45, BV$_{CEO}$ of 10V, cut-off frequency of 30GHz and power gain of 1 3dBm. To extract the small signal equivalent circuit, the de-embedded method was applied for parasitic parameters and the calculation of circuit equations for intrinsic parameters.

• Proceedings of the KOSOMBE Conference
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• v.1998 no.11
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• pp.147-148
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• 1998

In this paper, we developed the process for depth-probe type silicon microelectrode arrays. The process consists of four mask steps only. The steps are for defining sites, windows, and for shaping probe using plasma etch from above, and for shaping using wet etch from below, respectively. The probe thickness is controlled by dry etching, not by impurity diffusion. We used gold electrodes with a triple dielectric system consisting of oxide/nitride/oxide. The shank of the probe taper from 200um to tens of urn tip and has 30 um thickness.

• Proceedings of the KIEE Conference
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• 1998.07e
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• pp.1752-1754
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• 1998

Recently the research about electron transport characteristic and energy distribute function in mixture gases within Helium, has been used and developed widely as industrial quality improvement of extinguish characteristic, electrical dielectric strength ability of application of each species high voltage apparatus, gas plasma etching progress of work to use manufacture of semiconductor, thin film molding by CVD, insulation film to use ultra LSI, etc. This paper analyze electron transport characteristic in the range E/N $1{\sim}60$[Td], pressure $0.1{\sim}6.0$[Torr] by MCS. It is necessary to seek electron drift velocity, diffusion coefficient, lonization coefficients, characteristic energy, mean energy and electron energy distribution function as electron transport characteristic.

• Transactions on Electrical and Electronic Materials
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• v.11 no.4
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• pp.190-193
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• 2010

This report covers an effective fabrication method of graphene nanoribbon for top-gated field effect transistors (FETs) utilizing electron beam lithography with a bi-layer resists (XR-1541/poly methtyl methacrylate) process. To improve the variation of the gating properties of FETs, the residues of an e beam resist on the graphene channel are successfully taken off through the combination of reactive ion etching and a lift-off process for the XR-1541 bi-layer. In order to identify the presence of graphene structures, atomic force microscopy measurement and Raman spectrum analysis are performed. We believe that the lift-off process with bi-layer resists could be a good solution to increase gate dielectric properties toward the high quality of graphene FETs.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.917-919
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• 2009

Effects of nano-silver contents(15~50wt%) on screen printed-etched gate electrodes and electrical characteristics of OTFTs were investigated. As Ag contents increased, the screen-printed film was transferred exactly without spreading and obtained the densely-packed layer with a stable and excellent conductivity but, its thickness was increased and surface became rougher. It was found that the leakage current of MIM devices and off-state currents of OTFTs became larger due to poor step coverage of PVP dielectric layer on the thick and rough gate electrodes for nano-Ag inks with Ag contents more than 30wt%.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.158-159
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• 2006

The resistance-capacitance (RC) delay of signals through interconnection materials becomes a big hurdle for high speed operation of semiconductors which contain multilayer interconnection layers. In order to reduce the RC delay, low-k materials will be used for inter-metal dielectric (IMD) materials. We have developed self-consistent simulation tool that includes neutral-species transport model, based on the relaxation continuum (RCT) model. We present the parametric study of the modeling results of a two-frequency capacitively coupled plasma (2f-CCP) with $N_2/H_2$ gas mixture that is known as promising one for organic low-k materials etching. We include the neutral transport model as well as plasma one in the calculation. The plasma and neutrals are calculated self-consistently by iterating the simulation of both species till a spatiotemporal steady state profile could be obtained.

• Proceedings of the Korean Powder Metallurgy Institute Conference
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• 2006.09a
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• pp.374-375
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• 2006

Three-dimensional artificial crystals with periodicity corresponding to terahertz wave lengths were fabricated by self-assembling monosized metal spherical particles. The metal crystals were weakly sintered to utilize them as templates. The metal templates were inverted to air spheres crystal embedded in dielectric resin though infiltration and etching. The resulting resin inverted crystals clearly presented the photonic stop gaps within terahertz wave region and the frequencies of the gaps were confirmed to agree well with calculation by plane wave expansion method.

• 한국초전도학회:학술대회논문집
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• v.15
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• pp.56-56
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• 2005

• Journal of the Semiconductor & Display Technology
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• v.17 no.3
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• pp.85-89
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• 2018

Temperature uniformity of a wafer in a semiconductor process is a very important factor that determines the overall yield. Therefore, it is very important to confirm the temperature characteristics of the chuck surface on which the wafer is lifted. The temperature characteristics of the chuck depend on the external heat source, the shape of the cooling channel inside the chuck, the material on the chuck surface, and so on. In this study, CFD confirms the change of temperature characteristics according to the stacking order of ceramic materials and inner coolant path on the chuck surface. Finally this study suggests the best cooling condition of electrostatic chuck.