• 제목/요약/키워드: Diagram System

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A Design and Implementation of DML(Diagram Markup Language) System (DML(Diagram Markup Language) 시스템의 설계 및 구현)

  • Kim Sung keun;Kim Young chul;Yoo Chae woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.3B
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    • pp.95-104
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    • 2005
  • The diagram has a intuition and simplicity So, it is widely used in various fields in current computing environment. But, because of the absence of a standard diagram specification method, we have difficulty in exchanging the diagram data between different diagram software and besides, we spend much money and time to code diagram component, rules and semantics to which diagram would be applied. So We propose a method for defining diagram component's shapes and actions, diagram's rules and semantics using XML. And We design and implement the diagram system which execute XML document specifying diagram. In the diagram system, We can define diagram component in WISWIG manner and generate DML document automatically. So We can develop diagram system more efficiently. And by defining diagram rules using DTD, we also achieve the consistency of DTD meaning. And We propose Semantic Definition XML for specifying diagram semantics. So, diagram sentence which drawn by users could be given semantics and executed in diagram system. In this thesis, many VPL(Visual Programming Language) concepts were adopted to implement diagram system environment.

Deadlock Detection of Software System Using UML State Machine Diagram (UML State Machine Diagram을 이용한 소프트웨어 시스템의 데드락 탐지)

  • Min, Hyun-Seok
    • Journal of Convergence Society for SMB
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    • v.1 no.1
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    • pp.75-83
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    • 2011
  • Unified Modeling Language (UML) is widely accepted in industry and particularly UML State Machine Diagram is popular for describing the dynamic behavior of classes. This paper discusses deadlock detection of System using UML State Machine Diagram. Since a State Machine Diagram is used for indivisual class' behavior, all the State Machine Diagrams of the classes in the system are combined to make a big system-wide State Machine Diagram to describe system behavior. Generally this system-wide State Machine Diagram is very complex and contains invalid state and transitions. To make it a usable and valid State Machine Diagram, synchronization and externalization are applied. The reduced State Machine Diagram can be used for describing system behavior thus conventional model-checking technique can be applied. This paper shows how deadlock detection of system can be applied with simple examples. All the procedures can be automatically done in the tool.

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A Diagram System based on XML (XML 기반 다이어그램 시스템)

  • Kim Sung-Keun;Kim Young-Chul;Youn Tae Hee;Yoo Chae-Woo
    • The KIPS Transactions:PartD
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    • v.12D no.3 s.99
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    • pp.447-454
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    • 2005
  • Generally, Diagram Systems related XML document are designed for certain purpose. It is also difficult to create DML document, because there is no definition of diagram component. In this paper, we design and implement the diagram system to execute the XML document. This diagram system defines the diagram component with WYSIWIG concept ,md it is designed to generate DML document automatically. Therefore, it is possible to develop diagram efficiently and maintain consistency by definition of syntax about diagram with DTD. And this system uses the concept of VPL(Visual Programming Language) to check syntax and semantic about diagram sentence. Though this system, DML documents can be generated easily, and it can also check syntax and perform semantic.

A Study on the Optical Pickup Design using the Bode Diagram (주파수 선도를 이용한 광픽업 설계 연구)

  • 손도현;홍삼열;최인호;김영중;김진용
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2001.11b
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    • pp.967-971
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    • 2001
  • The frequency characteristics of the optical pickup are investigated indirectly from the bode diagram of the open loop system and the actuator. However, there is necessity of acquiring the optical pickup bode diagram in a view of the differences in the frequency characteristics. One of the differences is that bode diagrams of the optical pickup are differ to that of the actuator and the other is that bode diagrams of the open loop system include controller, gains and filters. So this paper presents the method acquiring the optical pickup bode diagram. In addition, usefulness of the optical pickup bode diagram was demonstrated by being applied to the optical pickup design. The reason of reducing the development period and acquiring the frequency characteristics of the optical system, the optical pickup bode diagram has many merits in the optical pickup design before acquiring the stable bode diagram of the open loop system.

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Design for System Development Mothed with Extended user Participation (사용자의 참여를 확장한 시스템 개발 방법의 설계)

  • Lee, Seo-Jeong;Park, Jae-Nyeon
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.5
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    • pp.1272-1279
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    • 1999
  • This paper suggests system development method with extended user participation. Context diagram, event diagram, information diagram, management diagram and interface STD are staple products. This method introduces interface STD, management diagram and context diagram with administrator as relator. We adapted to research business of professor and ATM(Automatic Teller machine), when it can be adaptable to business-oriented system.

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GPU-accelerated Reliability Analysis Method using Dynamic Reliability Block Diagram based on DEVS Formalism (DEVS 형식론 기반의 Dynamic Reliability Block Diagram과 GPU 가속 기술을 이용한 신뢰도 분석 방법)

  • Ha, Sol;Ku, Namkug;Roh, Myung-Il
    • Journal of the Korea Society for Simulation
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    • v.22 no.4
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    • pp.109-118
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    • 2013
  • This paper adopts the system configuration to assess the reliability instead of making a fault tree (FT), which is a traditional method to analyze reliability of a certain system; this is the reliability block diagram (RBD) method. The RBD method is a graphical presentation of a system diagram connecting the subsystems of components according to their functions or reliability relationships. The equipment model for the reliability simulation is modeled based on the discrete event system specification (DEVS) formalism. In order to make various alternatives of target system, this paper also adopts the system entity structure (SES), an ontological framework that hierarchically represents the elements of a system and their relationships. To enhance the calculation time of reliability analysis, GPU-based accelerations are adopted to the reliability simulation.

An Auto-drawing Algorithm for the Single Line Diagram of Distribution Systems (배전선로 회선별단선도 자동생성 알고리즘)

  • Son, Ju-Hwan;Lim, Seong-Il
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.5
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    • pp.854-859
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    • 2010
  • Distribution Automation System(DAS) is designed to improve operational efficiency by acquisition and control of remote data using its components such as central computation units, communication network and feeder remote terminal units. A conventional human machine interface of the DAS adopts a schematic diagram which is made by drawing power equipments on the geographic information system map. The single line diagram is more useful than the schematic diagram for the main tasks of distribution system operation such as protective relay coordination, service restoration and loss minimization. Since the configuration of the distribution line is changed according to the relocation of the open tie switches, the auto-drawing algorithm based on the connection between the sections and the switches is an essential technique. This paper proposes a new auto-drawing algorithm for a single line diagram of distribution systems based on tertiary tree and collision avoidance method. The feasibility of the proposed algorithm has been testified for various cases using practical distribution system with 12 feeders.

Test Case Generation Strategy for Timing Diagram (Timing diagram의 테스트 케이스 생성 전략)

  • Lee, Hong-Seok;Chung, Ki-Hyun;Choi, Kyung-Hee
    • The KIPS Transactions:PartD
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    • v.17D no.4
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    • pp.283-296
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    • 2010
  • Timing diagram is a useful tool for describing the specification of system, but there is no study for test case strategy of a timing diagram. To solve this problem, we followed the steps to generate test cases from timing diagram in this paper. 1) We defined a timing diagram formally. 2) We describe the method of transforming from a timing diagram model into a Stateflow model which has an equivalent relationship between a timing diagram model and a transformed Stateflow model. 3) We generated test cases from a transformed Stateflow model using SDV which is plugged in Simulink. To show that our approach is useful, we made an experiment with a surveillance model and arbitrary timing diagram models. In the experiment we transformed timing diagram models into Stateflow models, generated test cases from transformed Stateflow models using SDV, and analyzed the generation results. The conclusion that can be obtained from this study is that timing diagram is not only a specification tool but also a useful tool when users are trying to generate test cases based on model.

A Study on the Process of the Architectural Design Generation based on the 3D Voronoi Diagram (3차원 보로노이 다이어그램을 활용한 건축 디자인 생성 프로세스에 관한 연구)

  • Park, Jong-Gin;Jun, Han-Jong
    • Korean Journal of Computational Design and Engineering
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    • v.14 no.5
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    • pp.306-313
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    • 2009
  • This paper presents the unique formation process of a volumetric space with the digital algorithm developed for Voronoi diagram in order to generate an effective parametric architectural form. By applying systematic parameters of architectural conditions within digital parametric tools, the interactions among sub-spaces developed by Voronoi diagram are enhanced by manipulating the spatial structures. In this paper, we discuss how the parametric distributing and zoning geometrical system can support designers in developing a free-formed space, and research on how this system creates a 3D volumetric space. With the in-depth research on the system and structure of Voronoi diagram, the approaches to the application of Voronoi diagram into architectural form generation are clarified to be an effective, creative and successful digital tool. The result of the application of the Voronoi diagram improves the design quality with systematic language in the sense that the sub-regions are created and controlled under the systematic and balanced hierarchy having dynamic relationships among each others with the restoration of the equilibrium of forces and tensions. This 3-dimensional Voronoi diagram provides another means for designers to solve architectural issues and to reinforce their design concepts.

StateflowTD - A unified modeling Formalism of Stateflow and Timing Diagram (StateflowTD - Stateflow와 Timing diagram의 통합 모델링 방법론)

  • Lee, Hong-Seok;Chung, Ki-Hyun;Choi, Kyung-Hee
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.12B
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    • pp.1227-1235
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    • 2010
  • Stateflow is a useful system modeling tool, which is frequently used in industry. But Stateflow has defects when users are trying to describe consecutive behaviors or a system's temporal behaviors. Timing diagram, on the other hand, is a widely used tool of explaining behaviors of a hardware system in electronics. This tool has a merit when specifying consecutive behaviors and temporal behaviors of a system. Thus, this paper suggests $Stateflow_{TD}$, the unified modeling methodology in Stateflow domain integrating Stateflow with Timing diagram in order to improve the shortcomings of Stateflow. This paper not only explains a technique of integrating both a Stateflow model and Timing diagram models, and describes advantages of what $Stateflow_{TD}$ formalism has, but also shows its convenience using two example systems.