• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.122-130
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• 2013

This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.37-47
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• 2006

This work proposes a 10b 25MS/s $0.8mm^2$ 4.8mW 0.13um CMOS A/D Converter (ADC) for high-performance wireless communication systems such as DVB, DAB and DMB simultaneously requiring low voltage, low power, and small area. A two-stage pipeline architecture minimizes the overall chip area and power dissipation of the proposed ADC at the target resolution and sampling rate while switched-bias power reduction techniques reduce the power consumption of analog amplifiers. A low-power sample-and-hold amplifier maintains 10b resolution for input frequencies up to 60MHz based on a single-stage amplifier and nominal CMOS sampling switches using low threshold-voltage transistors. A signal insensitive 3-D fully symmetric layout reduces the capacitor and device mismatch of a multiplying D/A converter while low-noise reference currents and voltages are implemented on chip with optional off-chip voltage references. The employed down-sampling clock signal selects the sampling rate of 25MS/s or 10MS/s with a reduced power depending on applications. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.42LSB and 0.91LSB and shows a maximum SNDR and SFDR of 56dB and 65dB at all sampling frequencies up to 2SMS/s, respectively. The ADC with an active die area if $0.8mm^2$ consumes 4.8mW at 25MS/s and 2.4mW at 10MS/s at a 1.2V supply.

• Journal of Mushroom
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• v.17 no.4
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• pp.211-217
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• 2019

Currently, cultivation of mushrooms using the Information and Communication Technology (ICT)-based smart farming technique is increasing rapidly. The main environmental factors for growth of mushrooms are temperature, humidity, carbon dioxide (CO₂), and light. Among all the mentioned factors, currently, only temperature has been maintained under automatic control. However, humidity and ventilation are controlled using a timer, based on technical experience.Therefore, in this study, a Pleurotus eryngii first-generation smart farm model was set up that can automatically control temperature, humidity, and ventilation. After installing the environmental control system and the monitoring device, the environmental condition of the mushroom cultivation room and the growth of the fruiting bodies were studied. The data thus obtained was compared to that obtained using the conventional cultivation method.In farm A, the temperature during the primordia formation stage was about 17℃, and was maintained at approximately 16℃ during the fruiting stage. The humidity was initially maintained at 95%, and the farm was not humidified after the primordia formation stage. There was no sensor for CO₂ management, and the system was ventilated as required by observing the shape of the pileus and the stipe. It was observed that, the concentration of CO₂ was between 700 and 2,500 ppm during the growth period. The average weight of the mushrooms produced in farm A was 125 g, and the quality was between that of the premium and the first grade.In farm B. The CO₂ sensor was in use for measurement purposes only; the system was ventilated as required by observing the shape of the pileus and the stipe. During the growth period, the CO₂ concentration was observed to be between 640 and 4,500 ppm. The average weight of the mushrooms produced in farm B was 102 g.These results indicate that the quality of the king oyster mushroom is determined by the environmental conditions, especially by the concentration of CO₂. Thus, the data obtained in this study can be used as an optimal smart farm model, where, by improving the environmental control method of farm A, better quality mushrooms were obtained.