• 제목/요약/키워드: Device fabrication

Search Result 1,412, Processing Time 0.031 seconds

Nanoscale Fabrication of Biomolecular Layer and Its Application to Biodevices

  • Park, Jeong-Woo;Nam, Yun-Suk;Masamichi Fujihira
    • Biotechnology and Bioprocess Engineering:BBE
    • /
    • v.9 no.2
    • /
    • pp.76-85
    • /
    • 2004
  • Biodevices composed of biomolecular layer have been developed in various fields such as medical diagnosis, pharmaceutical screening, electronic device, photonic device, environmental pollution detection device, and etc. The biomolecules such as protein, DNA and pigment, and cells have been used to construct the biodevices such as biomolecular diode, biostorage device, bioelectroluminescence device, protein chip, DNA chip, and cell chip. Substantial interest has focused upon thin film fabrication or the formation of biomaterials mono- or multi-layers on the solid surfaces to construct the biodevices. Based on the development of nanotechnology, nanoscale fabrication technology for biofilm has been emerged and applied to biodevices due to the various advantages such as high density immobilization and orientation control of immoblized biomolecules. This review described the nanoscale fabrication of biomolecular film and its application to bioelectronic devices and biochips.

Transparent Conductor-embedding Si for High-performing Hetrojunction Photoelectric Devices

  • Kim, Joondong
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2014.02a
    • /
    • pp.444.2-444.2
    • /
    • 2014
  • Transparent conductors (TCs) are typically applied as an ohmic contact layer for photoelectric devices. Recent researches have illuminated a unique rectifying-junction design between a transparent conductor and a semiconductor layer. This approach may lead a significant reduction of device-fabrication steps and cost. A high-performing heterojunction device is presented, which provided significant photoelectric responses. This covers the fabrication processes, rectifying-junction formations and device analyses.

  • PDF

Metalorganic VPE growth of GaInP and related semiconductors for mobile communication device application

  • Udagawa, Takashi
    • Journal of the Korean Crystal Growth and Crystal Technology
    • /
    • v.11 no.5
    • /
    • pp.207-210
    • /
    • 2001
  • Metal-organic VPE (MOVPE) epitaxial growth procedure and related device fabrication technique are reported for GaInP-based epitaxial materials and devices. For GaInP/GaInAs two-dimensional electron-gas field-effect transistor (TEGFET), a promising epitaxial stacking structure resulting in enhanced electron mobility is given. In conjunction with this, a new device fabrication technique to improve luminous intensity of GaInP-based LED is also shown.

  • PDF

Ink Jet Printing of Functional Materials

  • Canisius, Johannes;Brookes, Paul;Heckmeier, Michael;James, Mark;Mueller, David;Patterson, Katie
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2007.08b
    • /
    • pp.1121-1124
    • /
    • 2007
  • Ink jet printing has been targeted as a key technology for OLED, TFT backplane and other organic semiconductor device fabrication. This presentation will concentrate on aspects of the IJ process, formulation design, jetting performance, interaction with the substrate and resultant printed device performance.

  • PDF

The Fabrication and Characterization of CODE MOSFET (CODE MOSFET 소자의 제작 및 특성)

  • 송재혁;김기홍;박영준;민홍식
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.27 no.6
    • /
    • pp.895-900
    • /
    • 1990
  • With the MOS device scailing down, the substrate concentration must increase in order to avoid punchthrough leakage current due to the DIBL(Drain Induced Barrier Lowering) effect. However the enhancement of the substrate concentration increases source, drain juntion capacitances and substrate current due to hot elelctron, degrading the speed characteristics and reliability of the MOS devices. In this paper, a new device, called CODE(Channel Only Dopant Enhancement) MOS, an its fabrication are proposed. By comparing the fabricated CODE MOSFET with the conventional device, the improvements on DIBL, substrate current and source, drain juntion capacitances are realized.

  • PDF

The Process and Fabrication of 500 V Unified Trench Gate Power MOSFET (500 V급 Unified Trench Gate Power MOSFET 공정 및 제작에 관한 연구)

  • Kang, Ey-Goo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.26 no.10
    • /
    • pp.720-725
    • /
    • 2013
  • Power MOSFET operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. We have analyzed trench process, field limit ring process for fabrication of unified trench gate power MOSFET. And we have analyzed electrical characteristics of fabricated unified trench gate power MOSFET. The optimal trench process was based on SF6. After we carried out SEM measurement, we obtained superior trench gate and field limit ring process. And we compared electrical characteristics of planar and trench gate unified power MOSFET after completing device fabrication. As a result, the both of them was obtained 500 V breakdown voltage. However trench gate unified power MOSFET was shown improved Vth and on state voltage drop characteristics than planar gate unified power MOSFET.

Fabrication of Superconducting Transition Edge Sensors based on Ti/Au Bilayer Formation (Ti/Au 이중층을 이용한 초전도 상전이 센서 제작)

  • Lee, Young-Hwa;Kim, Yong-Hamb
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.21 no.10
    • /
    • pp.943-949
    • /
    • 2008
  • We report on the development of transition edge sensors for x-ray detection. The sensor technology was based on the fabrication of a superconducting film on a thin membrane. A bilayer of a superconductor, Ti, and a noble metal, Au, was e-beam evaporated on a micromachined SiNx. Another Au layer was evaporated on the two side edges of the bilayer in order not to be affected by structural imperfections at the boundaries. With the method described in the present report, the superconducting transition temperature of the device was consistently achieved to near 80 mK with a sharp transition. The energy spectrum ueasured with the device provided 37 eV FWHM for 5.9 x-rays. We also discuss the design and fabrication considerations as well as the performance of the device in detail.

Digital Micromirror Device Based Microstereolithography for the Fabrication of 3D Microstructures (미세 3차원 구조물 제조를 위한 디지털 마이크로미러소자 응용 마이크로 광조형)

  • Joo, J.Y.;Kim, S.H.;Jeong, S.H.
    • Laser Solutions
    • /
    • v.9 no.1
    • /
    • pp.1-7
    • /
    • 2006
  • In order to increase the productivity of conventional microstereolithography (MSL), digital micromirror device($DMD^{TM}$) based MSL is proposed and the feasibility of 3D rnicrocomponents fabrication is demonstrated in two ways; free surface and constrained surface techniques. The clearness of optical images at the exposure plane was confirmed for the fabrication of an accurate 3D structure by controlling the dynamic viscosity of FA1260T and the shape accuracy of a structure fabricated with epoxy-based resin ($Somos^{\circledR}$ 10120) was analyzed to determine the optimum curing conditions. After finding the appropriate process variables, the feasibility of multiple microstructures is then demonstrated. Due to the high productivity, MSL using $DMD^{TM}$ showed the potential to replace the existing focused laser beam MSL.

  • PDF

Fabrication of a SOI Hall Device Using Si -wafer Dircet Bonding Technology (실리콘기판 직접접합기술을 이용한 SOI 흘 소자의 제작)

  • 정귀상
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 1994.11a
    • /
    • pp.86-89
    • /
    • 1994
  • This paper describes the fabrication and basic characteristics of a Si Hall device fabricated on a SOI(Si-on-insulator) structure. In which SOI structure was formed by SOB(Si-wafer direct bonding) technology and the insulator of the SOI structure was used as the dielectrical isolation layer of a Hall device. The Hall voltage and sensitivity of the implemented SDB SOI Hall devices showed good linearity with respectivity to the applied magnetic flux density and supple iud current. The product sensitivity of the SDB SOI Hall device was average 670 V/A$.$T and its value has been increased up to 3 times compared to that of bulk Si with buried layer of 10$\mu\textrm{m}$. Moreover, this device can be used at high-temperature, high-radiation and in corrosive environments.