• Title/Summary/Keyword: Design optimization library

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Personal Recommendation Service Design Through Big Data Analysis on Science Technology Information Service Platform (과학기술정보 서비스 플랫폼에서의 빅데이터 분석을 통한 개인화 추천서비스 설계)

  • Kim, Dou-Gyun
    • Journal of the Korean BIBLIA Society for library and Information Science
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    • v.28 no.4
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    • pp.501-518
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    • 2017
  • Reducing the time it takes for researchers to acquire knowledge and introduce them into research activities can be regarded as an indispensable factor in improving the productivity of research. The purpose of this research is to cluster the information usage patterns of KOSEN users and to suggest optimization method of personalized recommendation service algorithm for grouped users. Based on user research activities and usage information, after identifying appropriate services and contents, we applied a Spark based big data analysis technology to derive a personal recommendation algorithm. Individual recommendation algorithms can save time to search for user information and can help to find appropriate information.

FE model updating based on hybrid genetic algorithm and its verification on numerical bridge model

  • Jung, Dae-Sung;Kim, Chul-Young
    • Structural Engineering and Mechanics
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    • v.32 no.5
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    • pp.667-683
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    • 2009
  • FE model-based dynamic analysis has been widely used to predict the dynamic characteristics of civil structures. In a physical point of view, an FE model is unavoidably different from the actual structure as being formulated based on extremely idealized engineering drawings and design data. The conventional model updating methods such as direct method and sensitivity-based parameter estimation are not flexible for model updating of complex and large structures. Thus, it is needed to develop a model updating method applicable to complex structures without restriction. The main objective of this paper is to present the model updating method based on the hybrid genetic algorithm (HGA) by combining the genetic algorithm as global optimization method and modified Nelder-Mead's Simplex method as local optimization method. This FE model updating method using HGA does not need the derivation of derivative function related to parameters and without application of complicated inverse analysis methods. In order to allow its application on diversified and complex structures, a commercial FEA tool is adopted to exploit previously developed element library and analysis algorithms. Moreover, an output-level objective function making use of measurement and analytical results is also presented to update simultaneously the stiffness and mass of the analysis model. The numerical examples demonstrated that the proposed method based on HGA is effective for the updating of the FE model of bridge structures.

Initial Design Domain Reset Method for Genetic Algorithm with Parallel Processing

  • Lim, O-Kaung;Hong, Keum-Shik;Lee, Hyuk-Soo;Park, Eun-Ho
    • Journal of Mechanical Science and Technology
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    • v.18 no.7
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    • pp.1121-1130
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    • 2004
  • The Genetic Algorithm (GA), an optimization technique based on the theory of natural selection, has proven to be a relatively robust means of searching for global optimum. It converges to the global optimum point without auxiliary information such as differentiation of function. In the case of a complex problem, the GA involves a large population number and requires a lot of computing time. To improve the process, this research used parallel processing with several personal computers. Parallel process technique is classified into two methods according to subpopulation's size and number. One is the fine-grained method (FGM), and the other is the coarse-grained method (CGM). This study selected the CGM as a parallel process technique because the load is equally divided among several computers. The given design domain should be reduced according to the degree of feasibility, because mechanical system problems have constraints. The reduced domain is used as an initial design domain. It is consistent with the feasible domain and the infeasible domain around feasible domain boundary. This parallel process used the Message Passing Interface library.

Neutronics design of VVER-1000 fuel assembly with burnable poison particles

  • Tran, Hoai-Nam;Hoang, Van-Khanh;Liem, Peng Hong;Hoang, Hung T.P.
    • Nuclear Engineering and Technology
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    • v.51 no.7
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    • pp.1729-1737
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    • 2019
  • This paper presents neutronics design of VVER-1000 fuel assembly using burnable poison particles (BPPs) for controlling excess reactivity and pin-wise power distribution. The advantage of using BPPs is that the thermal conductivity of BPP-dispersed fuel pin could be improved. Numerical calculations have been conducted for optimizing the BPP parameters using the MVP code and the JENDL-3.3 data library. The results show that by using $Gd_2O_3$ particles with the diameter of $60{\mu}m$ and the packing fraction of 5%, the burnup reactivity curve and pin-wise power distribution are obtained approximately that of the reference design. To minimize power peaking factor (PPF), total BP amount has been distributed in a larger number of fuel rods. Optimization has been conducted for the number of BPP-dispersed rods, their distribution, BPP diameter and packing fraction. Two models of assembly consisting of 18 BPP-dispersed rods have been selected. The diameter of $300{\mu}m$ and the packing fraction of 3.33% were determined so that the burnup reactivity curve is approximate that of the reference one, while the PPF can be decreased from 1.167 to 1.105 and 1.113, respectively. Application of BPPs for compensating the reduction of soluble boron content to 50% and 0% is also investigated.

Implementation of Systolic Array for the Single-Source Shortest Path Problem

  • Lee, Jae-Jin;Park, Jeong-Pil;Hwang, In-Jae;Song, Gi-Yong
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.361-364
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    • 2002
  • Shortest path problem belongs to the combinatorial optimization problem and plays an important role in the field of computer aided design. It can either be directly applied as in the case of routing or serves as a important subroutine in more complex problems. In this paper, a systolic array for the SSSP(single-source shortest path problem) was derived. The array was modeled and simulated in RTL level using VHDL, then synthesized to a schematic and finally implemented to a layout using the cell library based on 0.35 $\mu\textrm{m}$ CMOS 1-poly 4-metal CMOS technology.

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A Study on Low Power Force-Directed scheduling for Optimal module selection Architecture Synthesis (최적 모듈 선택 아키텍쳐 합성을 위한 저전력 Force-Directed 스케쥴링에 관한 연구)

  • Choi Ji-young;Kim Hi-seok
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.459-462
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    • 2004
  • In this paper, we present a reducing power consumption of a scheduling for module selection under the time constraint. A a reducing power consumption of a scheduling for module selection under the time constraint execute scheduling and allocation for considering the switching activity. The focus scheduling of this phase adopt Force-Directed Scheduling for low power to existed Force-Directed Scheduling. and it constructs the module selection RT library by in account consideration the mutual correlation of parameters in which the power and the area and delay. when it is, in this paper we formulate the module selection method as a multi-objective optimization and propose a branch and bound approach to explore the large design space of module selection. Therefore, the optimal module selection method proposed to consider power, area, delay parameter at the same time. The comparison experiment analyzed a point of difference between the existed FDS algorithm and a new FDS_RPC algorithm.

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ANN Modeling of a Gas Sensor

  • Baha, H.;Dibi, Z.
    • Journal of Electrical Engineering and Technology
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    • v.5 no.3
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    • pp.493-496
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    • 2010
  • At present, Metal Oxide gas Sensors (MOXs) are widely used in gas detection because of its advantages, including high sensitivity and low cost. However, MOX presents well-known problems, including lack of selectivity and environment effect, which has motivated studies on different measurement strategies and signal-processing algorithms. In this paper, we present an artificial neural network (ANN) that models an MOX sensor (TGS822) used in a dynamic environment. This model takes into account dependence in relative humidity and in gas nature. Using MATLAB interface in the design phase and optimization, the proposed model is implemented as a component in an electronic simulator library and accurately expressed the nonlinear character of the response and that its dependence on temperature and relative humidity were higher than gas nature.

Design and Implementation of the Systolic Array for Dynamic Programming

  • Lee, Jae-Jin;Tien, David;Song, Gi-Yong
    • Journal of the Institute of Convergence Signal Processing
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    • v.4 no.3
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    • pp.61-67
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    • 2003
  • We propose a systolic array for dynamic programming which is a technique for solving combinatorial optimization problems. We derive a systolic array for single source shortest path Problem, SA SSSP, and then show that the systolic array serves as dynamic Programming systolic array which is applicable to any dynamic programming problem by developing a systolic array for 0 1 knapsack problem, SA 01KS, with SA SSSP for a basis. In this paper, each of SA SSSP and SA 01KS is modeled and simulated in RT level using VHDL, then synthesized to a schematic and finally implemented to a layout using the cell library based on 0.35${\mu}{\textrm}{m}$ 1 poly 4 metal CMOS technology.

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Design of IIR Loop Filter to minimize A flick Phenomenon of An image (영상의 깜박거림 현상을 최소화하기 위한 순환 루프 필터의 설계)

  • O. Moon;Lee, B.;Lee, H.;Lee, Y.;B. Kang;C. Hong
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2000.12a
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    • pp.165-168
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    • 2000
  • In this paper, we propose a method, an optimized architecture of a device with an image signal process of a field unit to minimize the flick phenomenon that happens in direction of a color temperature at a color tone change. The proposed IIR loop filter has an optimized architecture and reduced hardware compared with previous filters. In order to achieve the optimization for the hardware complexity. It is designed by time-multiplexing architecture. The proposed IIR loop filter is synthesized by using the STD90 0.35um cell library.

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Evaluation Toolkit for K-FPGA Fabric Architectures (K-FPGA 패브릭 구조의 평가 툴킷)

  • Kim, Kyo-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.4
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    • pp.15-25
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    • 2012
  • The research on the FPGA CAD tools in academia has been lacking practicality due to the underlying FPGA fabric architecture which is too simple and inefficient to be applied for commercial FPGAs. Recently, the database of placement positions and routing graphs on commercial FPGA architectures has been built, and provided for enabling the academic development of placement and routing tools. To extend the limit of academic CAD tools even further, we have developed the evaluation toolkit for the K-FPGA architecture which is under development. By providing interface for exchanging data with a commercial FPGA toolkit at every step of mapping, packing, placement and routing in the tool chain, the toolkit enables individual tools to be developed without waiting for the results of the preceding step, and with no dependency on the quality of the results, and compared in detail with commercial tools at any step. Also, the fabric primitive library is developed by extracting the prototype from a reporting file of a commercial FPGA, restructuring it, and modeling the behavior of basic gates. This library can be used as the benchmarking target, and a reference design for new FPGA architectures. Since the architecture is described in a standard HDL which is familiar with hardware designers, and read in the tools rather than hard coded, the tools are "data-driven", and tolerable with the architectural changes due to the design space exploration. The experiments confirm that the developed library is correct, and the functional correctness of applications implemented on the FPGA fabric can be validated by simulation. The placement and routing tools are under development. The completion of the toolkit will enable the development of practical FPGA architectures which, in return, will synergically animate the research on optimization CAD tools.