• 제목/요약/키워드: Design complexity

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The global standard realizing process of the Tire Production Facility and Process Line

  • Suzuki, Takeshi
    • 국제학술발표논문집
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    • The 6th International Conference on Construction Engineering and Project Management
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    • pp.28-29
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    • 2015
  • The tire production facility is a large-scale construction with the complexity of a manufacturing process. The process utilities should be wide-ranging as an effective arrangement of them is highly important. All the necessary information should be clarified together with the manufacturer at the basic planning stage, and this design should be developed to comply with the local culture and regulations. It is important to carry out more advanced engineering in terms of process, cost and quality, even if it is difficult to standardize due to the cultural and geographical conditions and regulations. The key point is to reflect all the given conditions and make a clear design during the design stage, to eliminate the problems after the construction has begun. Another key point is the delivery system, which must be totally managed from the initial design stage until the construction stage by proven companies. Flexibility, quick action, and single responsibility will be the fundamental features in all the steps of the project.

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Performance Based Seismic Design State of Practice, 2012 Manila, Philippines

  • Sy, Jose A.;Anwar, Naveed;HtutAung, Thaung;Rayamajhi, Deepak
    • 국제초고층학회논문집
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    • 제1권3호
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    • pp.203-209
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    • 2012
  • The purpose of this paper is to present the state of practice being used in the Philippines for the performance-based seismic design of reinforced concrete tall buildings. Initially, the overall methodology follows "An Alternative Procedure for Seismic Analysis and Design of Tall Buildings Located in the Los Angeles Region, 2008", which was developed by Los Angeles Tall Buildings Structural Design Council. After 2010, the design procedure follows "Tall Buildings Initiative, Guidelines for Performance-Based Seismic Design of Tall Buildings, 2010" developed by Pacific Earthquake Engineering Research Center (PEER). After the completion of preliminary design in accordance with code-based design procedures, the performance of the building is checked for serviceable behaviour for frequent earthquakes (50% probability of exceedance in 30 years, i.e,, with 43-year return period) and very low probability of collapse under extremely rare earthquakes (2% of probability of exceedance in 50 years, i.e., 2475-year return period). In the analysis, finite element models with various complexity and refinements are used in different types of analyses using, linear-static, multi-mode pushover, and nonlinear-dynamic analyses, as appropriate. Site-specific seismic input ground motions are used to check the level of performance under the potential hazard, which is likely to be experienced. Sample project conducted using performance-based seismic design procedures is also briefly presented.

열유동 해석을 이용한 컴퓨터 구조의 소형화 설계 (Optimal Miniaturization of Desk-Top Computer by Thermal Design)

  • 박성관
    • 한국CDE학회논문집
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    • 제4권4호
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    • pp.318-326
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    • 1999
  • Recently, electronic systems including computers have been rapidly shrinking in size while at the same time the complexity and the capability of these systems continue to grow/sup [1]/. Thus, system volumes have decreased as system power has increased, resulting in dramatic increases in system heat density. The high temperature of the computer system is considered as the major reason for low performance and shortening life of the product. It is necessary to solve this problem due to the heat density increased and to develop the design skill of the computer cabinet according to miniaturization. M4500 desk-top computer was selected for analyzing the thermal management inside cabinet. The cabinet volume, the configuration of the heating devices, the size and location of air ventilation, and the fan selection have been investigated as the important parameters to find out an optimal cabinet design. The objectives of this project were to analyze which design parameters would affect cooling performance by thermal strategy, to design an optimal model, and to measure the temperatures of the main parts to confirm the effect of the thermal design. The temperatures of each part of the optimal model were compared with those of the existing model. As a result. the volume of this miniaturized model was about 16% smaller than that of M4500 without any change in operating performance.

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상관개념(相關慨念: Correlative Concept)을 적용한 가구디자인에 관한 연구 (A Study of Furniture Design Using Application of Correlative Concept)

  • 윤여항;곽철안
    • 한국가구학회지
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    • 제17권3호
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    • pp.69-78
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    • 2006
  • Recently, the aspect of consumers' preference for design has been changed to a pattern of respect for personality, based on 'personal value of passion'. The differentiated personal passion of modern people does not allow them to select mass-produced industrial product, and leads them to choose life style different from others. Specially, consumers want to express. their differentiated personality by preferring and possessing the originally designed products. Therefore, the originally designed products that are clearly identifiable become the object of consumers' consideration, and stimulate the consumers' desire to purchase. According to new needs of consumers, it is required to reconsider the old design pattern of furniture based on simplicity and propose new design for furniture to meet the needs of consumers. Mass production has resulted in a strong focus on simplicity rather than difficulty and complexity of the production process. This tendency shows the design pattern that leans toward one side excluding the expression of correlative concept among design elements. This one sided design leads modern people to have no personality, and shows only simple and uniform expression of passion. Therefore, this paper is purposed to develop furniture with more personality by applying correlative concept that has been taken less seriously in the field of design to furniture design.

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DSM을 활용한 모듈러 건축 설계단계에서의 제작 및 시공 정보 반영 및 재시공 감소 방안 (Design and Planning Process Management for Reducing Rework in Modular Construction Using Dependency Structure Matrix (DSM))

  • 현호상;이현수;이정훈;박문서
    • 대한건축학회논문집:구조계
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    • 제35권2호
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    • pp.29-36
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    • 2019
  • Modular construction has benefits such as short construction duration and high productivity owing to the production in factory and owing to simultaneous on-site work. However, rework occurs in modular construction and the rework affects the efficiency of modular construction. The almost of causes of rework are exist in design process. To reduce the cause of rework, the information flow of the design process should be managed and the plan to reduce rework should be included. However, the modular construction has complex process because of impeded unit production so it is hard to manage the information flow in design process. Moreover, when the plan to reduce rework is included, the design process will be more complicated. Therefore, the objective of this research is to suggest the design process including the rework reduction plan and to alleviate the complexity of design process by using Dependency Structure Matrix(DSM). By using DSM, the iteration and feedback in design process is reduced and it can be expected that rework in modular project can be reduced by using suggested design process.

Study of an In-order SMT Architecture and Grouping Schemes

  • Moon, Byung-In;Kim, Moon-Gyung;Hong, In-Pyo;Kim, Ki-Chang;Lee, Yong-Surk
    • International Journal of Control, Automation, and Systems
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    • 제1권3호
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    • pp.339-350
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    • 2003
  • In this paper, we propose a simultaneous multithreading (SMT) architecture that improves instruction throughput by exploiting instruction level parallelism (ILP) and thread level parallelism (TLP). The proposed architecture issues and completes instructions belonging to the same thread in exact program order. The issue and completion policy greatly reduces the design complexity and hardware cost of our architecture, compared with others that employ out-of-order issue and completion. On the other hand, when the instructions belong to different threads, the issue and completion orders for those instructions may not necessarily be identical to the fetch order. The processor issues instructions simultaneously from multiple threads to functional units by exploiting ILP and TLP, and by dynamic resource sharing. That parallel execution notably improves performance and resource utilization with minimal additional hardware cost over the conventional superscalar processors. This paper proposes an SMT architecture with grouping as well as one without grouping. Without grouping, all threads dynamically and flexibly share most resources. On the other hand, in the SMT architecture with grouping, in which resources and threads are divided into several groups for design simplification, resources are shared only among threads belonging to the same group as those resources. Simulation results show that our processors with four and eight threads improve performance by three or more times over the conventional superscalar processor with comparable execution resources and policies, and that reasonable grouping reduces the design complexity of SMT processors with little negative effect on performance.

JPEG 2000 Hard-wired Encoder를 위한 칼라 2-D DWT Processor의 구현 (The implementation of the color component 2-D DWT Processor for the JPEG 2000 hard-wired encoder)

  • 이성목;조성대;강봉순
    • 융합신호처리학회논문지
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    • 제9권4호
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    • pp.321-328
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    • 2008
  • 본 논문에서는 차세대 정지영상 압축 표준 JPEG2000 CODEC의 Wavelet 변환부와 양자화기의 하드웨어 구조를 제안하고 선계하였다. 본 논문의 칼라 2-D DWT 프로세서는 JPEG 2000 Hard-wired Encoder에 적용하기 위해 제안하였다. JPEG 2000DWT(Discrete Wavelet Transform)에서는 Daubechies 9/7 filter를 사용하였고 2-B DWT의 변환과 복원과정에서의 오차가 ${\pm}1$LSB 이내로 들어갈 수 있게 설계하였다. 기존에 설계되었던 filter의 하드웨어 구조에서 하드웨어 복잡도를 높이는 곱셈기를 사용하지 않고 shift-and-adder 구조를 사용하였다. 이것은 DWT 변환에서 가장 많은 연산을 차지하는 filter의 동작 속도를 향상시킬 수 있으며 하드웨어 복잡도도 낮출 수 있다. 본 시스템은 표준화된 하드웨어 설계 언어인 Verilog-HDL을 사용하여 설계하였고, Synopsys사의 Design Analyzer와 TSMC $0.25{\mu}m$ ASIC Library를 사용하여 검증하였다.

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항공용 레이다의 3차 고조파 믹서 설계에 대한 연구 (A New Third-Order Harmonic Mixer Design for Microwave Airborne Radar)

  • 고민호;강세벽
    • 한국전자통신학회논문지
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    • 제15권5호
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    • pp.827-834
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    • 2020
  • 본 연구는 주파수 체배기 이론을 이용하여 초고주파 항공용 레이다를 위한 3차 고조파 믹서 설계에 대한 연구이다. 기본 믹서 설계 방법과는 달리 주파수 체배기 이론을 이용하여 국부 주파수(LO)의 3차 고조파 성분이 최대가 되는 게이트 바이어스 전압을 선택하여 중간주파수(IF)에서 3차 고조파 혼합(mixing) 성분이 최대가 되도록 하였다. 제안한 고조파 믹서는 플라스틱 패키지의 상용 GaAs MESFET 소자를 이용하여 설계 및 제작하여 기존 초고주파 믹서의 높은 변환손실, 회로 복잡성, 높은 가격 및 제작 복잡도를 개선할 수 있었다. 제안한 설계 방법을 이용한 3차 고조파 믹서는 33 GHz ~ 36 GHz 대역에서 8 ~10 dB 변환손실 특성 및 0 dBm 선형성 (P1dB) 특성을 나타내었다.

표본화 속도 변환기용 2단 직렬형 다상 FIR 필터의 설계 (A Design of Two-stage Cascaded Polyphase FIR Filters for the Sample Rate Converter)

  • 백제인;김진업
    • 한국통신학회논문지
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    • 제31권8C호
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    • pp.806-815
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    • 2006
  • 디지털 변복조 장치에는 디지털 신호의 표본화 속도를 변환시키는 표본화 속도 변환기(SRC: sample rate converter)가 필요한데, 여기에 사용되는 저역필터의 구현 문제를 연구하였다. 표본화 속도 변환율이 클 경우에는 저역필터의 신호처리 연산량이 많아져서 구현에 부담이 되므로 연산량을 감소시키는 방안이 중요하다. 본 논문에서는 이 필터를 2 단의 직렬 필터로 분할하여 구현하는 설계 방법을 제시하였고, 1 단 구조의 단일 필터로 구현하였을 경우에 비교하여 신호처리 연산량이 감소되는 것을 확인하였다. 표본화 속도 변환율이 증가할수록 2 단분할 방안에 의한 연산량 감소 효과는 증가하며, 변환율이 32 에서는 72 %까지 감소되는 것을 확인하였다. 변환율을 2 단으로 분할함에 있어서도 인수의 조합에 따라서 감소 효과가 다르게 나타났으므로, 여러 변환율에 대하여 최적 성능의 분할율을 조사하였다. 저역필터는 다상 필터 구조를 갖는 FIR 필터를 대상으로 하였으며, 필터계수의 설계는 Parks-McCllelan 알고리즘을 이용하였다.

저전력 영상 특징 추출 하드웨어 설계를 위한 하드웨어 폴딩 기법 기반 그라디언트 매그니튜드 연산기 구조 (Gradient Magnitude Hardware Architecture based on Hardware Folding Design Method for Low Power Image Feature Extraction Hardware Design)

  • 김우석;이주성;안호명
    • 한국정보전자통신기술학회논문지
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    • 제10권2호
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    • pp.141-146
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    • 2017
  • 본 논문에서는 저전력 영상 특징 추출 하드웨어 설계를 위한 하드웨어 폴딩 기법 기반 저면적 Gradient magnitude 연산기 구조를 제안한다. 하드웨어 복잡도를 줄이기 위해 Gradient magnitude 벡터의 특징을 분석하여 기존 알고리즘을 하드웨어를 공유하여 사용할 수 있는 알고리즘으로 변경하여 Folding 구조가 적용될 수 있도록 했다. 제안된 하드웨어 구조는 기존 알고리즘의 특징을 최대한 이용했기 때문에 데이터 품질의 열화가 거의 없이 구현될 수 있다. 제안된 하드웨어 구조는 Altera Quartus II v16.0 환경에서 Altera Cyclone VI (EP4CE115F29C7N) FPGA를 이용하여 구현되었다. 구현 결과, 기존 하드웨어 구조를 이용하여 구현한 연산기와의 비교에서 41%의 logic elements, 62%의 embedded multiplier 절감 효과가 있음을 확인했다.